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STM32U595AI Datenblatt(PDF) 310 Page - STMicroelectronics

Teilenummer STM32U595AI
Bauteilbeschribung  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U595AI Datenblatt(HTML) 310 Page - STMicroelectronics

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Electrical characteristics
STM32U59xxx
310/377
DS13633 Rev 1
Table 123. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings(1)
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
3 × tHCLK - 1
3 × tHCLK + 1
ns
tv(NOE_NE)
FMC_NEx low to FMC_NOE low
0
5
tw(NOE)
FMC_NOE low time
2 × tHCLK - 1
2 × tHCLK + 1
th(NE_NOE)
FMC_NOE high to FMC_NE high hold time
THCLK
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
2
th(A_NOE)
Address hold time after FMC_NOE high
2 × tHCLK - 1
-
tsu(Data_NE)
Data to FMC_NEx high setup time
tHCLK + 15
-
tsu(Data_NOE)
Data to FMC_NOEx high setup time
15
-
th(Data_NOE)
Data hold time after FMC_NOE high
0
-
th(Data_NE)
Data hold time after FMC_NEx high
0
-
tv(NADV_NE)
FMC_NEx low to FMC_NADV low
-
1.5
ns
tw(NADV)
FMC_NADV low time
-
THCLK + 1
1. Evaluated by characterization. Not tested in production.
Table 124. Asynchronous non-multiplexed SRAM/PSRAM/NOR read-NWAIT timings(1)
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
8 × tHCLK - 1
8 × tHCLK + 1
ns
tw(NOE)
FMC_NWE low time
7 × tHCLK - 1
7 × tHCLK + 1
tw(NWAIT)
FMC_NWAIT(2) low time
tHCLK
-
tsu(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high
5 × tHCLK + 9.5
-
th(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT invalid
4 × tHCLK + 10
-
1. Evaluated by characterization. Not tested in production.
2. NWAIT pulse is equal to one HCLK cycle.



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