Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

Preview PDF HTML

STM32U595AI Datenblatt(PDF) 315 Page - STMicroelectronics

Teilenummer STM32U595AI
Bauteilbeschribung  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U595AI Datenblatt(HTML) 315 Page - STMicroelectronics

Back Button STM32U595AI Datasheet HTML 311Page - STMicroelectronics STM32U595AI Datasheet HTML 312Page - STMicroelectronics STM32U595AI Datasheet HTML 313Page - STMicroelectronics STM32U595AI Datasheet HTML 314Page - STMicroelectronics STM32U595AI Datasheet HTML 315Page - STMicroelectronics STM32U595AI Datasheet HTML 316Page - STMicroelectronics STM32U595AI Datasheet HTML 317Page - STMicroelectronics STM32U595AI Datasheet HTML 318Page - STMicroelectronics STM32U595AI Datasheet HTML 319Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 315 / 377 page
background image
DS13633 Rev 1
315/377
STM32U59xxx
Electrical characteristics
343
Synchronous waveforms and timings
Figure 59 to Figure 62 represent synchronous waveforms and Table 131 to Table 134
provide the corresponding timings. The results shown in these tables are obtained with the
following FMC configuration:
•
BurstAccessMode = FMC_BurstAccessMode_Enable
•
MemoryType = FMC_MemoryType_CRAM
•
WriteBurst = FMC_WriteBurst_Enable
•
CLKDivision = 1
•
DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
In all timing tables, the THCLK is the HCLK clock period.
•
Maximum FMC_CLK = 80 MHz for 2.7 V ≤ VDD ≤ 3.6 V, with CL = 15pF and
with CL = 20 pF
•
Maximum FMC_CLK = 80 MHz for 1.71 V ≤ VDD ≤ 1.9 V with CL = 15pF and
with CL = 20 pF
Table 130. Asynchronous multiplexed PSRAM/NOR write-NWAIT timings(1)
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
8 × tHCLK - 1
8 × tHCLK + 1
ns
tw(NWE)
FMC_NWE low time
6 × tHCLK - 1
6 × tHCLK + 1
tsu(NWAIT_NE)
FMC_NWAIT(2) valid before FMC_NEx high
5 × tHCLK + 13
-
th(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT invalid
4 × tHCLK + 12
-
1. Evaluated by characterization. Not tested in production.
2. NWAIT pulse is equal to one HCLK cycle.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datenblatt Download

Go To PDF Page


Link URL



War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Link zum Datenblatt    |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com