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ATtiny45 Datenblatt(PDF) 127 Page - ATMEL Corporation |
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ATtiny45 Datenblatt(HTML) 127 Page - ATMEL Corporation |
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127 / 196 page ![]() 127 7598H–AVR–07/09 ATtiny25/45/85 • Bit 5 – IPR: Input Polarity Mode The Input Polarity mode allows software selectable differential input pairs and full 10 bit ADC resolution, in the unipolar input mode, assuming a pre-determined input polarity. If the input polarity is not known it is actually possible to determine the polarity first by using the bipolar input mode (with 9 bit resolution + 1 sign bit ADC measurement). And once determined, set or clear the polarity reversal bit, as needed, for a succeeding 10 bit unipolar measurement. • Bits 4..3 – Res: Reserved Bits These bits are reserved bits in the ATtiny25/45/85 and will always read as zero. • Bits 2:0 – ADTS2:0: ADC Auto Trigger Source If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig- ger source that is cleared to a trigger source that is set, will generate a positive edge on the trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set. 18.7.9 Digital Input Disable Register 0 – DIDR0 • Bits 5..2 – ADC3D..ADC0D: ADC3..0 Digital Input Disable When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis- abled. The corresponding PIN register bit will always read as zero when this bit is set. When an analog signal is applied to the ADC3..0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer. Table 18-6. ADC Auto Trigger Source Selections ADTS2 ADTS1 ADTS0 Trigger Source 0 0 0 Free Running mode 0 0 1 Analog Comparator 0 1 0 External Interrupt Request 0 0 1 1 Timer/Counter Compare Match A 1 0 0 Timer/Counter Overflow 1 0 1 Timer/Counter Compare Match B 1 1 0 Pin Change Interrupt Request Bit 765 432 10 – – ADC0D ADC2D ADC3D ADC1D AIN1D AIN0D DIDR0 Read/Write R R R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 |
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