ATtiny45 datasheet(44/196 Pages) ATMEL

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7598H–AVR–07/09

ATtiny25/45/85

The following code example shows one assembly and one C function for turning off the WDT.

The example assumes that interrupts are controlled (e.g., by disabling interrupts globally) so that

no interrupts will occur during execution of these functions.

Note:

1. The example code assumes that the part specific header file is included.

8.10

Timed Sequences for Changing the Configuration of the Watchdog Timer

The sequence for changing configuration differs slightly between the two safety levels. Separate

procedures are described for each level.

8.10.1

Safety Level 1

In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit

to one without any restriction. A timed sequence is needed when disabling an enabled Watch-

dog Timer. To disable an enabled Watchdog Timer, the following procedure must be followed:

In the same operation, write a logic one to WDCE and WDE. A logic one must be writ-

ten to WDE regardless of the previous value of the WDE bit.

Within the next four clock cycles, in the same operation, write the WDE and WDP bits

as desired, but with the WDCE bit cleared.

Assembly Code Example

(1)

WDT_off:

WDR

; Clear WDRF in MCUSR

ldi

r16, (0<<WDRF)

out

MCUSR, r16

; Write logical one to WDCE and WDE

; Keep old prescaler setting to prevent unintentional Watchdog Reset

r16, WDTCR

ori

r16, (1<<WDCE)|(1<<WDE)

out

WDTCR, r16

; Turn off WDT

ldi

r16, (0<<WDE)

out

WDTCR, r16

ret

C Code Example

(1)

void

WDT_off(void)

{

_WDR();

/* Clear WDRF in MCUSR */

MCUSR = 0x00

/* Write logical one to WDCE and WDE */

WDTCR |= (1<<WDCE) | (1<<WDE);

/* Turn off WDT */

WDTCR = 0x00;

}

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