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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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SPRUG18 Datenblatt(PDF) 192 Page - Texas Instruments |
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SPRUG18 Datenblatt(HTML) 192 Page - Texas Instruments |
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192 / 214 page  TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com 7.22 Antenna Interface Subsystem The Antenna Interface Subsystem (AIF) consists of the Antenna Interface module and two SERDES macros. The AIF relies on the performance SerDes macro (high-speed serial link) with a logic layer for the OBSAI RP3 and CPRI protocols. The AIF is used to connect to the backplane for transmission and reception of antenna data, as well as to additional device peripherals. The AIF supports OBSAI/CPRI daisy chaining between DSPs: • OBSAI - 768Mbps, 1.536Gbps, 3.072Gbps link rates supported • CPRI - 614.4Mbps, 1.2288Gbps, 2.4576Gbps link rates supported OBSAI and CPRI standards compliant antenna interface • 6 configurable (Full Duplex) high-speed serial links in either OBSAI or CPRI modes that can support a variety of data rates: • Supports star or daisy chain topologies. • Each link can be used for uplink or downlink. • Multiple slower links can be combined into faster speed links. • Controls Word content supplied via DSP software. The AIF is a slave peripheral, accepting all transactions from the DMA switch fabric, providing uplink data to device memory and transmitting downlink, delayed stream, and PIC data from device memory. Each link of the antenna interface includes a differential receive and transmit signal pair. Table 7-88. AIF Receive and Transmit Signal Pairs PIN NAMES I/O NUMBER DESCRIPTION AIFTXN [5:0] OUT 6 Antenna Interface Links 0-5 Transmit (Neg) Data Lines. AIFTXP [5:0] OUT 6 Antenna Interface Links 0-5 Transmit (Pos) Data Lines. AIFRXN [5:0] IN 6 Antenna Interface Links 0-5 Receive (Neg) Data Lines. AIFRXP [5:0] IN 6 Antenna Interface Links 0-5 Receive (Pos) Data Lines. 7.22.1 Antenna Interface System (AIF) Register Description(s) Table 7-89. Antenna Interface System Registers HEX ADDRESS ACRONYM REGISTER NAME 02BC 0000 AIF_PD AI Peripheral ID 02BC 0004 AIF_GLOBAL_CFG AI Global Configuration 02BC 0008 AIF_EMU_CNTL AI Emulation Control 02BC 000C VC_BUS_ERR VC Bus Error Register 02BC 0010 - 02BC 2FFC - Reserved 02BC 3000 CD_OUT_MUX_SEL_CFG Combiner - Decombiner Output Mux Select Config Register 0 02BC 3004 CD_CB_SRC_SEL_CFG Combiner Source Select Config Register 02BC 3008 CD_CB_OFFSET_CFG Combiner Alignment Offset Config Register 02BC 300C CD_CB_VALID_WIND_CFG Combiner Valid Window Config Register 02BC 3010 CD_DC_SRC_SEL_CFG Decombiner Source Select Config Register 02BC 3014 CD_DC_DST_SEL_CFG Decombiner Destination Select Config Register 02BC 3018 - 02BC 307C - Reserved 02BC 3080 CD_STS Combiner - Decombiner Status Register 02BC 3084 - 02BC 3FFC - Reserved 02BC 4000 LINK0_CFG Link 0 Configuration Register 02BC 4004 - 02BC 47FC - Reserved 02BC 4800 LINK1_CFG Link 1 Configuration Register 192 Peripheral Information and Electrical Specifications Copyright © 2008–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) :TMS320C6474 |
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