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SPRUG18 Datenblatt(PDF) 27 Page - Texas Instruments |
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SPRUG18 Datenblatt(HTML) 27 Page - Texas Instruments |
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27 / 214 page ![]() TMS320C6474 www.ti.com SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 Table 2-5. Terminal Functions (continued) SIGNAL TYPE(1) IPD/IPU(2) SIGNAL DESCRIPTION NAME NO. Core Clock Select to select between SYSCLK(N|P) and ALTCORECCLK to the CORECLKSEL AF7 I main PLL RIOSGMIICLKN D9 I RapidIO/SGMII Reference Clock to drive the RapidIO and SGMII SERDES RIOSGMIICLKP C9 I DDR MEMORY CONTROLLER DDRDQM0 W24 O/Z DDRDQM1 AE24 O/Z DDR2 EMIF Data Masks DDRDQM2 B24 O/Z DDRDQM3 H24 O/Z DDRCE L24 O/Z DDR2 EMIF Chip Enable DDRBA0 T25 O/Z DDRBA1 R25 O/Z DDR Bank Address DDRBA2 U25 O/Z DDRA00 K25 O/Z DDRA01 N25 O/Z DDRA02 M25 O/Z DDRA03 R26 O/Z DDRA04 L25 O/Z DDRA05 N27 O/Z DDRA06 L26 O/Z DDR2 EMIF Address Bus DDRA07 U26 O/Z DDRA08 K26 O/Z DDRA09 R27 O/Z DDRA10 P25 O/Z DDRA11 L27 O/Z DDRA12 U27 O/Z DDRA13 K27 O/Z DDRCLKOUTP0 V25 O/Z DDRCLKOUTN0 V24 O/Z DDR2 EMIF Output Clocks to drive SDRAMs (one clock pair per SDRAM) DDRCLKOUTP1 J25 O/Z DDRCLKOUTN1 J24 O/Z Copyright © 2008–2011, Texas Instruments Incorporated Device Overview 27 Submit Documentation Feedback Product Folder Link(s) :TMS320C6474 |
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