TMS570LS3137 datasheet(6/159 Pages) TI

6 / 159 page

TMS570LS3137

SPNS162.

– SEPTEMBER 2011

www.ti.com

TMS570LS3137 16/32-Bit RISC Flash

4.6

Clocks

.............................................. 59

Microcontroller

.......................................... 1

4.7

Clock Monitoring

.................................... 67

1.1

Features

.............................................. 1

4.8

Glitch Filters

........................................ 69

1.2

Applications

.......................................... 2

4.9

Device Memory Map

................................ 70

4.10

Flash Memory

...................................... 77

1.3

Description

........................................... 3

4.11

Tightly-Coupled RAM Interface Module

............ 80

1.4

Functional Block Diagram

............................ 5

4.12

Parity Protection for Accesses to peripheral RAMs

1.1

Device Configuration

................................. 7

...................................................... 80

Device Package and Terminal Functions

......... 11

4.13

On-Chip SRAM Initialization and Testing

........... 82

2.2

PGE QFP Package Pinout (144-Pin)

............... 11

4.14

External Memory Interface (EMIF)

................. 84

2.3

ZWT BGA Package Ball-Map (337 Ball Grid Array)

4.15

Vectored Interrupt Manager

........................ 91

...................................................... 12

4.16

DMA Controller

..................................... 94

2.4

Terminal Functions

................................. 13

4.17

Real Time Interrupt Module

........................ 96

Device Operating Conditions

....................... 42

4.18

Error Signaling Module

............................. 98

3.1

Absolute Maximum Ratings Over Operating

4.19

Reset / Abort / Error Sources

..................... 102

Free-Air Temperature Range,

...................... 42

4.20

Digital Windowed Watchdog

...................... 104

3.2

Device Recommended Operating Conditions

...... 42

4.21

Debug Subsystem

................................. 105

3.3

Switching Characteristics over Recommended

Peripheral Information and Electrical

Operating Conditions for Clock Domains

........... 43

Specifications

......................................... 116

3.4

Wait States Required

............................... 43

5.1

Peripheral Legend

................................. 116

3.5

Power Consumption Over Recommended

5.2

Multi-Buffered 12bit Analog-to-Digital Converter

Operating Conditions

............................... 44

..................................................... 116

3.6

Input/Output Electrical Characteristics Over

5.3

General-Purpose Input/Output

.................... 127

Recommended Operating Conditions

.............. 45

5.4

Enhanced High-End Timer (N2HET)

.............. 128

3.7

Output Buffer Drive Strengths

...................... 45

5.5

FlexRay Interface

................................. 132

3.8

Input Timings

....................................... 46

5.6

Controller Area Network (DCAN)

.................. 134

3.9

Output Timings

..................................... 47

5.7

Local Interconnect Network Interface (LIN)

....... 135

3.10

Low-EMI Output Buffers

............................ 49

5.8

Serial Communication Interface (SCI)

............ 136

System Information and Electrical Specifications

5.9

Inter-Integrated Circuit (I2C)

...................... 137

............................................................. 51

5.10

Multi-Buffered / Standard Serial Peripheral Interface

..................................................... 140

4.1

Device Power Domains

............................. 51

5.11

Ethernet Media Access Controller

................ 152

4.2

Voltage Monitor Characteristics

.................... 52

Mechanical Data

...................................... 155

4.3

Power Sequencing and Power On Reset

.......... 53

6.1

Thermal Data

...................................... 155

4.4

Warm Reset (nRST)

................................ 55

6.2

Packaging Information

............................ 155

4.5

™ CPU Information

............. 56

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