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TMS570LS3137 Datenblatt(PDF) 85 Page - Texas Instruments |
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TMS570LS3137 Datenblatt(HTML) 85 Page - Texas Instruments |
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85 / 159 page ![]() EMIF_nCS[3:2] 11 Asserted Deasserted 2 2 EMIF_BA[1:0] EMIF_ADDR[21:0] EMIF_DATA[15:0] EMIF_nOE EMIF_WAIT SETUP Extended Due to EMIF_WAIT STROBE HOLD 14 STROBE EMIF_nCS[3:2] EMIF_BA[1:0] EMIF_ADDR[21:0] EMIF_nWE EMIF_DATA[15:0] EMIF_nOE 15 1 16 18 20 22 24 17 19 21 23 26 27 EMIF_nDQM[1:0] TMS570LS3137 www.ti.com SPNS162. – SEPTEMBER 2011 Figure 4-12. EMIFnWAIT Read Timing Requirements 4.14.2.2 Write Timing (Asynchronous RAM) Figure 4-13. Asynchronous Memory Write Timing Copyright © 2011, Texas Instruments Incorporated System Information and Electrical Specifications 85 Submit Documentation Feedback focus.ti.com: TMS570LS3137 |
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