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TMS570LS3137 Datenblatt(PDF) 86 Page - Texas Instruments |
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TMS570LS3137 Datenblatt(HTML) 86 Page - Texas Instruments |
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86 / 159 page ![]() EMIF_nCS[3:2] 25 Asserted 2 2 EMIF_BA[1:0] EMIF_ADDR[21:0] EMIF_DATA[15:0] EMIF_nWE EMIF_WAIT SETUP Extended Due to EMIF_WAIT 28 Deasserted STROBE STROBE HOLD EMIF_CLK EMIF_BA[1:0] EMIF_ADDR[21:0] EMIF_DATA[15:0] 1 2 2 4 6 8 8 12 14 19 20 3 5 7 7 11 13 17 18 2 EM_CLK Delay BASIC SDRAM READ OPERATION EMIF_nCS[0] EMIF_nDQM[1:0] EMIF_nRAS EMIF_nCAS EMIF_nWE TMS570LS3137 SPNS162. – SEPTEMBER 2011 www.ti.com Figure 4-14. EMIFnWAIT Write Timing Requirements 4.14.2.3 Read Timing (Synchronous RAM) Figure 4-15. Basic SDRAM Read Operation 86 System Information and Electrical Specifications Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TMS570LS3137 |
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