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TMS570LS3137 Datenblatt(PDF) 1 Page - Texas Instruments

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Teilenummer TMS570LS3137
Bauteilbeschribung  TMS570LS3137 16/32-Bit RISC Flash Microcontroller
PDF  159 Pages
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS570LS3137 Datenblatt(HTML) 1 Page - Texas Instruments

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TMS570LS3137
www.ti.com
SPNS162.
– SEPTEMBER 2011
TMS570LS3137 16/32-Bit RISC Flash Microcontroller
Check for Samples: TMS570LS3137
1
TMS570LS3137 16/32-Bit RISC Flash Microcontroller
1.1
Features
1
• High-Performance Automotive Grade
• Multiple Communication Interfaces
Microcontroller for Safety Critical Applications
– 10/100 Mbps Ethernet MAC (EMAC)
– Dual CPU’s running in lockstep
IEEE 802.3 compliant (3.3V-I/O only)
– ECC on flash and RAM interfaces
Supports MII and MDIO
– Built-In Self Test for CPU and on-chip RAMs
– FlexRay Controller with 2 channels
– Error Signaling Module with Error Pin
8KB message RAM with parity protection
– Voltage and Clock Monitoring
Dedicated Transfer Unit (FTU)
• ARM® Cortex™ – R4F 32-bit RISC CPU
– Three CAN Controllers (DCAN)
– Efficient 1.6DMIPS/MHz with 8-stage pipeline
64 mailboxes with parity protection each
– Floating-Point Unit with Single/Double
Compliant to CAN protocol version 2.0B
Precision
– Inter-Integrated Circuit (I2C)
– 12-Region Memory Protection Unit
– Three Multi-buffered Serial Peripheral
– Open Architecture with 3rd Party Support
Interfaces (MibSPI)
• Operating Conditions
128 Words with Parity Protection each
– Up to 180MHz System Clock
– Two Standard Serial Peripheral Interfaces
– Core Supply Voltage (VCC): 1.2V nominal
(SPI)
– I/O Supply Voltage (VCCIO): 3.3V nominal
– Local Interconnect Network Interface (LIN)
Controller
• Integrated Memory
Compliant to LIN protocol version 2.1
– Up to 3MB Program Flash with ECC
– Standard Serial Communication Interface
– Up to 256KB RAM with ECC
(SCI)
– 64KB Flash for emulated EEPROM
• Two High-End Timer Modules (N2HET)
• 16- bit External Memory Interface
– N2HET1: 32 programmable channels
• Common Platform Architecture
– N2HET2: 20 programmable channels
– Consistent memory map across family
– 160 Word Instruction RAM with parity
– Real-Time Interrupt Timer (RTI) OS Timer
protection each
– 96-channel Vectored Interrupt Module (VIM)
– Each includes Hardware Angle Generator
– 2-channel Cyclic Redundancy Checker (CRC)
– Dedicated Transfer Unit for each N2HET
• Direct Memory Access (DMA) Controller
(HTU)
– 16 Channels and 32 Control Packets
• Two 10/12-bit Multi-Buffered ADC Modules
– Parity protection for control packet RAM
– ADC1: 24 channels
– DMA Accesses Protected by Dedicated MPU
– ADC2: 16 channels
• Frequency-Modulated Phase-Locked-Loop
– 16 shared channels
(FMPLL) with Built-In Slip Detector
– 64 result buffers with parity protection each
• Separate Non-Modulating PLL for FlexRay
• Packages
• IEEE 1149.1 JTAG, Boundary Scan and ARM
– 144-pin Quad Flatpack (PGE) [Green]
CoreSight Components
– 337-Ball Grid Array (ZWT) [Green]
• JTAG Security Module
• Trace and Calibration Capabilities
– Embedded Trace Macrocell (ETM-R4)
– Data Modification Module (DMM)
– RAM Trace Port (RTP)
– Parameter Overlay Module (POM)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative
Copyright
© 2011, Texas Instruments Incorporated
or design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right
to change or discontinue these products without notice.


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