Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

Preview PDF HTML

AD6674 Datenblatt(PDF) 70 Page - Analog Devices

Teilenummer AD6674
Bauteilbeschribung  385 MHz BW IF Diversity Receiver
PDF  97 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD6674 Datenblatt(HTML) 70 Page - Analog Devices

Back Button AD6674 Datasheet HTML 66Page - Analog Devices AD6674 Datasheet HTML 67Page - Analog Devices AD6674 Datasheet HTML 68Page - Analog Devices AD6674 Datasheet HTML 69Page - Analog Devices AD6674 Datasheet HTML 70Page - Analog Devices AD6674 Datasheet HTML 71Page - Analog Devices AD6674 Datasheet HTML 72Page - Analog Devices AD6674 Datasheet HTML 73Page - Analog Devices AD6674 Datasheet HTML 74Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 70 / 97 page
background image
Data Sheet
AD6674
Rev. C | Page 69 of 96
Table 35 and Table 36 show the JESD204B output configura-
tions supported for both N΄ = 16 and N΄ = 8, respectively, for a
given number of virtual converters. Take care to ensure that the
serial lane rate for a given configuration is within the supported
range of 3.125 Gbps to 12.5 Gbps.
See the Example 1: ADC with DDC Option (Two ADCs + Four
DDCs) section and the Example 2: ADC with NSR Option
(Two ADCs + NSR) section for two examples describing which
JESD204B transport layer settings are valid for a given chip
mode.
Table 34. Virtual Converter Mapping
No. of
Virtual
Converters
Supported
Chip
Operating
Mode
(Register
0x200[3:0])
Chip Q
Ignore
(Register
0x200[5])
Virtual Converter Mapping
0
1
2
3
4
5
6
7
1
One DDC
mode (0x1)
Real (I only)
(0x1)
DDC 0 I
samples
Unused
Unused
Unused
Unused
Unused
Unused
Unused
2
One DDC
mode (0x1)
Complex
(I/Q) (0x0)
DDC 0 I
samples
DDC 0 Q
samples
Unused
Unused
Unused
Unused
Unused
Unused
2
Two DDC
mode (0x2)
Real (I only)
(0x1)
DDC 0 I
samples
DDC 1 I
samples
Unused
Unused
Unused
Unused
Unused
Unused
4
Two DDC
mode (0x2)
Complex
(I/Q) (0x0)
DDC 0 I
samples
DDC 0 Q
samples
DDC 1 I
samples
DDC 1 Q
samples
Unused
Unused
Unused
Unused
4
Four DDC
mode (0x3)
Real (I only)
(0x1)
DDC 0 I
samples
DDC 1 I
samples
DDC 2 I
samples
DDC 3 I
samples
Unused
Unused
Unused
Unused
8
Four DDC
mode (0x3)
Complex
(I/Q) (0x0)
DDC 0 I
samples
DDC 0 Q
samples
DDC 1 I
samples
DDC 1 Q
samples
DDC 2 I
samples
DDC 2 Q
samples
DDC 3 I
samples
DDC 3 Q
samples
1 to 2
NSR mode
(0x7)
Real or
complex
(0x0)
ADC A
Samples
ADC B
Samples
Unused
Unused
Unused
Unused
Unused
Unused
1 to 2
VDR mode
(0x8)
Real or
complex
(0x0)
ADC A
Samples
ADC B
Samples
Unused
Unused
Unused
Unused
Unused
Unused
Table 35. JESD204B Output Configurations for N΄ = 16
Number of Virtual
Converters Supported
(Same Value as M)
JESD204B Quick
Configuration
(Register 0x570)
JESD204B
Serial Lane
Rate1
JESD204B Transport Layer Settings2
L
M
F
S
HD
N
N΄
CS
K3
1
0x01
20 × fOUT
1
1
2
1
0
8 to 16
16
0 to 3
Only valid K values
that are divisible by 4
are supported
0x40
10 × fOUT
2
1
1
1
1
8 to 16
16
0 to 3
0x41
10 × fOUT
2
1
2
2
0
8 to 16
16
0 to 3
0x80
5 × fOUT
4
1
1
2
1
8 to 16
16
0 to 3
0x81
5 × fOUT
4
1
2
4
0
8 to 16
16
0 to 3
2
0x0A
40 × fOUT
1
2
4
1
0
8 to 16
16
0 to 3
0x49
20 × fOUT
2
2
2
1
0
8 to 16
16
0 to 3
0x88
10 × fOUT
4
2
1
1
1
8 to 16
16
0 to 3
0x89
10 × fOUT
4
2
2
2
0
8 to 16
16
0 to 3
4
0x13
80 × fOUT
1
4
8
1
0
8 to 16
16
0 to 3
0x52
40 × fOUT
2
4
4
1
0
8 to 16
16
0 to 3
0x91
20 × fOUT
4
4
2
1
0
8 to 16
16
0 to 3
8
0x1C
160 × fOUT
1
8
16
1
0
8 to 16
16
0 to 3
0x5B
80 × fOUT
2
8
8
1
0
8 to 16
16
0 to 3
0x9A
40 × fOUT
4
8
4
1
0
8 to 16
16
0 to 3
1 fOUT is the output sample rate. fOUT = ADC sample rate/chip decimation. The JESD204B serial lane rate must be ≥3.125 Gbps and ≤12.5 Gbps; when the serial lane rate is
≤12.5 Gbps and ≥6.25 Gbps, the low lane rate mode must be disabled (set Bit 4 to 0x0 in Register 0x56E). When the serial lane rate is <6.25 Gbps and ≥3.125 Gbps, the
low lane rate mode must be enabled (set Bit 4 to 0x1 in Register 0x56E).
2 JESD204B transport layer descriptions are as described in the JESD204B Overview section.
3 For F = 1, K = 20, 24, 28, and 32. For F = 2, K = 12, 16, 20, 24, 28, and 32. For F = 4, K = 8, 12, 16, 20, 24, 28, and 32. For F = 8 and F = 16, K = 4, 8, 12, 16, 20, 24, 28, and 32.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97


Datenblatt Download

Go To PDF Page


Link URL



War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Link zum Datenblatt    |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com