AD6674 datasheet(3/97 Pages) AD

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AD6674

Data Sheet

Rev. C | Page 2 of 96

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 3

Product Highlights ........................................................................... 4

Specifications..................................................................................... 5

DC Specifications ......................................................................... 5

AC Specifications.......................................................................... 6

Digital Specifications ................................................................... 8

Switching Specifications .............................................................. 9

Timing Specifications .................................................................. 9

Absolute Maximum Ratings.......................................................... 11

Thermal Characteristics ............................................................ 11

ESD Caution................................................................................ 11

Pin Configuration and Function Descriptions........................... 12

Typical Performance Characteristics ........................................... 14

AD6674-1000 .............................................................................. 14

AD6674-750 ................................................................................ 18

AD6674-500 ................................................................................ 22

Equivalent Circuits ......................................................................... 26

Theory of Operation ...................................................................... 28

ADC Architecture ...................................................................... 28

Analog Input Considerations.................................................... 28

Voltage Reference ....................................................................... 33

Clock Input Considerations ...................................................... 34

Power-Down/Standby Mode..................................................... 35

Temperature Diode .................................................................... 36

ADC Overrange and Fast Detect.................................................. 37

ADC Overrange (OR)................................................................ 37

Fast Threshold Detection (FD_A and FD_B) ........................ 37

Signal Monitor ................................................................................ 38

SPORT over JESD204B.............................................................. 38

Digital Downconverter (DDC)..................................................... 41

DDC I/Q Input Selection .......................................................... 41

DDC I/Q Output Selection ....................................................... 41

DDC General Description ........................................................ 41

Frequency Translation ................................................................... 47

General Description................................................................... 47

DDC NCO + Mixer Loss and SFDR........................................ 48

Numerically Controlled Oscillator .......................................... 48

FIR Filters ........................................................................................ 50

General Description................................................................... 50

Half-Band Filters ........................................................................ 51

DDC Gain Stage ......................................................................... 52

DDC Complex to Real Conversion ......................................... 52

DDC Example Configurations ................................................. 53

Noise Shaping Requantizer (NSR) ............................................... 57

Decimating Half-Band Filter .................................................... 57

NSR Overview ............................................................................ 57

Variable Dynamic Range (VDR) .................................................. 60

VDR Real Mode.......................................................................... 61

VDR Complex Mode ................................................................. 61

Digital Outputs ............................................................................... 63

Introduction to JESD204B Interface........................................ 63

JESD204B Overview .................................................................. 63

Functional Overview ................................................................. 64

JESD204B Link Establishment ................................................. 64

Physical Layer (Driver) Outputs .............................................. 66

JESD204B Tx Converter Mapping ........................................... 68

Configuring the JESD204B Link.............................................. 68

Multichip Synchronization............................................................ 72

SYSREF± Setup/Hold Window Monitor................................. 74

Test Modes....................................................................................... 76

ADC Test Modes ........................................................................ 76

JESD204B Block Test Modes .................................................... 76

Serial Port Interface (SPI).............................................................. 79

Configuration Using the SPI..................................................... 79

Hardware Interface..................................................................... 79

SPI Accessible Features.............................................................. 79

Memory Map .................................................................................. 80

Reading the Memory Map Register Table............................... 80

Memory Map Register Table..................................................... 81

Applications Information .............................................................. 95

Power Supply Recommendations............................................. 95

Exposed Pad Thermal Heat Slug Recommendations............ 95

AVDD1_SR (Pin 57) and AGND (Pin 56, Pin 60) ................ 95

Outline Dimensions ....................................................................... 96

Ordering Guide .......................................................................... 96

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