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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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SPRUG18 Datenblatt(PDF) 206 Page - Texas Instruments |
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SPRUG18 Datenblatt(HTML) 206 Page - Texas Instruments |
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206 / 214 page  2 2 1 3 4 FSYNCCLK(N|P) FRAMEBURST 2 2 1 3 4 ALTFSYNCCLK ALTFSYNCPULSE 2 2 1 3 4 TRTCLK TRT TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com 7.23.2 FSYNC Electrical Data/Timing Table 7-92. Timing Requirements for FSYNC (see Figure 7-48, Figure 7-49, and Figure 7-50) NO. PARAMETER MIN MAX UNIT 1 tc(FSCLK) Cycle time 8.1388 ns 2 tc(FSCLK) Pulse duration, ALTSYNCCLK high or low 0.4 tc(FSCLK) 0.6 tc(FSCLK) ns 3 tu(FSPLS) Setup time, ALTFSYNCPULSE high before ALTFSYNCCLK high 2 ns 4 th(FSPLS) Hold time, ALTFSYNCPULSE low after ALTFSYNCCLK high 2 ns 5 tj(FSCLK) Period Jitter (peak-to-peak) FSYNCCLK(N|P) 0.025 x tc ns Figure 7-48. FSYNC Clock and Synchronization Timing Figure 7-49. Alternate FSYNC Clock and Synchronization Timing Figure 7-50. TRT Clock and Synchronization Timing 206 Peripheral Information and Electrical Specifications Copyright © 2008–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s) :TMS320C6474 |
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