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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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DLPA2000 Datenblatt(PDF) 47 Page - Texas Instruments |
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DLPA2000 Datenblatt(HTML) 47 Page - Texas Instruments |
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47 / 63 page  9.4 DMD Fast Park Control (PARKZ) PARKZ is an input early warning signal that must alert the controller at least 32 µs before DC supply voltages drop below specifications. Typically, the PARKZ signal is provided by the DLPAxxxx interrupt output signal. PARKZ must be deasserted (set high) prior to releasing RESETZ (that is, prior to the low-to-high transition on the RESETZ input) for normal operation. When PARKZ is asserted (set low) the controller performs a Fast Park operation on the DMD which assists in maintaining the lifetime of the DMD. The reference clock must continue running and RESETZ must remain deactivated for at least 32 µs after PARKZ has been asserted (set low) to allow the park operation to complete. Fast Park operation is only intended for use when loss of power is imminent and beyond the control of the host processor (for example, when the external power source has been disconnected or the battery has dropped below a minimum level). The longest lifetime of the DMD may not be achieved with Fast Park operation. The longest lifetime is achieved with a Normal Park operation (initiated through GPIO_08). Hence, PARKZ is typically only used instead of a Normal Park request if there is not enough time for a Normal Park. A Normal Park operation takes much longer than 32 µs to park the mirrors. During a Normal Park operation, the DLPAxxxx keeps on all power supplies, and keeps RESETZ high, until the longer mirror parking has completed. Additionally, the DLPAxxxx may hold the supplies on for a period of time after the parking has been completed. View the relevant DLPAxxxx datasheet for more information. The longer mirror parking time ensures the longest DMD lifetime and reliability. The DMD Parking Switching Characteristics section specifies the park timings. 9.5 Hot Plug I/O Usage The DLPC34xx controller provides fail-safe I/O on all host interface signals (signals powered by VCC_INTF). This allows these inputs to externally be driven even when no I/O power is applied. Under this condition, the controller does not load the input signal nor draw excessive current that could degrade controller reliability. For example, the I2C bus from the host to other components is not affected by powering off VCC_INTF to the DLPC34xx controller. The allows additional devices on the I2C bus to be utilized even if the controller is not powered on. TI recommends weak pullup or pulldown resistors to avoid floating inputs for signals that feed back to the host. If the I/O supply (VCC_INTF) powers off, but the core supply (VDD) remains on, then the corresponding input buffer may experience added leakage current; however, the added leakage current does not damage the DLPC34xx controller. However, if VCC_INTF is powered and VDD is not powered, the controller may drives the IIC0_xx pins low which prevents communication on this I2C bus. Do not power up the VCC_INTF pin before powering up the VDD pin for any system that has additional secondary devices on this bus. www.ti.com DLPC3420 DLPS232 – OCTOBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 47 Product Folder Links: DLPC3420 |
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