RZSLASHT1 datasheet(18/139 Pages) RENESAS

18 / 139 page

R01DS0228EJ0200 Rev.2.00

Page 18 of 139

Jun. 30, 2025

RZ/T1 Group

1. Overview

16-bit timer pulse unit

(TPUa)

TIOCA0, TIOCB0,

TIOCC0, TIOCD0

I/O

TGRA0 to TGRD0 input capture input/output compare output/

PWM output pins

TIOCA1, TIOCB1

I/O

TGRA1 and TGRB1 input capture input/output compare output/

PWM output pins

TIOCA2, TIOCB2

I/O

TGRA2 and TGRB2 input capture input/output compare output/

PWM output pins

TIOCA3, TIOCB3,

TIOCC3, TIOCD3

I/O

TGRA3 to TGRD3 input capture input/output compare output/

PWM output pins

TIOCA4, TIOCB4

I/O

TGRA4 and TGRB4 input capture input/output compare output/

PWM output pins

TIOCA5, TIOCB5

I/O

TGRA5 and TGRB5 input capture input/output compare output/

PWM output pins

TCLKA, TCLKB,

TCLKC, TCLKD

Input

External clock input pins for TPUa (unit 0)

TIOCA6, TIOCB6,

TIOCC6, TIOCD6

I/O

TGRA6 to TGRD6 input capture input/output compare output/

PWM output pins

TIOCA7, TIOCB7

I/O

TGRA7 and TGRB7 input capture input/output compare output/

PWM output pins

TIOCA8, TIOCB8

I/O

TGRA8 and TGRB8 input capture input/output compare output/

PWM output pins

TIOCA9, TIOCB9,

TIOCC9, TIOCD9

I/O

TGRA9 to TGRD9 input capture input/output compare output/

PWM output pins

TIOCA10, TIOCB10

I/O

TGRA10 and TGRB10 input capture input/output compare output/

PWM output pins

TIOCA11, TIOCB11

I/O

TGRA11 and TGRB11 input capture input/output compare output/

PWM output pins

TCLKE, TCLKF,

TCLKG, TCLKH

Input

External clock input pins for TPUa (unit 1)

Programmable pulse

generator (PPG)

PO0 to PO31

Output

Pulse output pins

Compare match timer W

(CMTW)

TIC0 to TIC3

Input

CMTW input capture input pins

TOC0 to TOC3

Output

CMTW output compare output pins

Serial communication

interface with FIFO

(SCIFA)

SCK0 to SCK4

I/O

Clock I/O pins

RXD0 to RXD4

Input

Input the receive data.

TXD0 to TXD4

Output

Output the transmit data.

CTS0# to CTS4#

I/O

Hardware flow control input (transmission enable signal)/general

output

RTS0# to RTS4#

Output

Hardware flow control output (transmission request signal)/general

output

I2C bus interface (RIICa)

SCL0, SCL1

I/O

Clock I/O pins. The bus can be directly driven by the N-channel

open drain.

SDA0, SDA1

I/O

Data I/O pins. The bus can be directly driven by the N-channel

open drain.

Table 1.4

Pin Functions (4 / 7)

Classifications

Pin Name

I/O

Description

RZ/T1 Datenblatt(PDF) 18 Page - Renesas Technology Corp

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