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RZ/T1 Datenblatt(PDF) 132 Page - Renesas Technology Corp |
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RZ/T1 Datenblatt(HTML) 132 Page - Renesas Technology Corp |
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132 / 139 page ![]() RZ/T1 Group R01DS0228EJ0200 Rev.2.00 Page 132 of 139 Jun. 30, 2025 REVISION HISTORY RZ/T1 Group Datasheet Rev. Date Description Page Summary 0.60 Nov. 14, 2014 ― First edition, issued 0.70 Dec. 25, 2014 Features 1 ■ Operating temperature range: Heading title and description corrected Section 1 Overview 11 Table 1.3 List of Products (2 / 2): Note corrected 21 Figure 1.3 Pin Arrangement (176-pin HLQFP): The names of pins 33, 34, 38, 39, and 91, corrected 26 Table 1.5 Pin Assignments (320-Pin FBGA) (5 / 8): The names of pins M20 and P19, corrected 27 Table 1.5 Pin Assignments (320-Pin FBGA) (6 / 8): The names of pins R14, R19, R20, T9, V7, and V8, corrected 29 Table 1.5 Pin Assignments (320-Pin FBGA) (8 / 8): The names of pins Y16 and Y17, corrected 30 Table 1.6 Pin Assignments (176-Pin HLQFP) (1 / 4): The names of pins 33, 34, 38, and 39, corrected 31 Table 1.6 Pin Assignments (176-Pin HLQFP) (2 / 4): The names of pins 58, 59, 60, 79, 82, and 83, corrected 32 Table 1.6 Pin Assignments (176-Pin HLQFP) (3 / 4): The names of pins 91 and 110, corrected 33 Table 1.6 Pin Assignments (176-Pin HLQFP) (4 / 4): The names of pins 136, 153, 154, 155, 156, and 157, corrected 39 Table 1.7 List of Pin and Pin Functions (320-Pin FBGA) (6 / 10): The name of pin M20, corrected 40 Table 1.7 List of Pin and Pin Functions (320-Pin FBGA) (7 / 10): The names of pins P19, R8, and R14, corrected 41 Table 1.7 List of Pin and Pin Functions (320-Pin FBGA) (8 / 10): The names of pins R19, R20, T9, V7, and V8, corrected 42 Table 1.7 List of Pin and Pin Functions (320-Pin FBGA) (9 / 10): The names of pins Y16 and Y17, corrected 1.10 Jul. 08, 2016 Feature 1 Wholly amended 1. Overview 2 to 49 Wholly amended 2. Electrical Characteristics 50 to 129 Newly added 1.20 Mar. 02, 2017 1. Overview 9 Table 1.2 Comparison of Functions for Different Packages: Functions of ETHERC and ECATC, modified. Note 1 added. 12 Figure 1.1 Block Diagram: Functional blocks of ECATC and ETHERC, modified. Note 1 modified. 20 Figure 1.2 Pin Arrangement (320-Pin FBGA) (Top View): Pin ERROROUT#, modified 2. Electrical Characteristics 53 Table 2.3 DC Characteristics (2) [Power Supply] Test conditions, modified: Product part no. added 55 Table 2.4 DC Characteristics (3) [Except for USB2.0 Host/Function-Related Pins] Item modified: "Input pull-up MOS current and resistance" and "Input pull-down MOS current and resistance" Rpu1, Rpu2, Rpd1, and Rpd2 were added. Test conditions for "Input pull-down MOS current and resistance" were modified. 58 Table 2.10 Operating Frequency: Notes 1 to 3, added. The max. value of the CPU clock (CPUCLK), modified. REVISION HISTORY |
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