SSM4567ACBZ-R7 datasheet(26/52 Pages) AD

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SSM4567

Data Sheet

Rev. 0 | Page 26 of 52

APPLICATIONS INFORMATION

COMPONENT SELECTION FOR BOOST REGULATORS

Inductor Selection

The inductor is an essential part of the boost regulator. It stores

energy during on time of the low-side power FET in the boost

regulator. It is during this time that the input current is at its

maximum. The maximum input current must be taken into

account to determine the inductor value. The maximum dc

input current (that is, the maximum average inductor current)

can be estimated by using the following equation:

OUT

MAX

LOAD

)

(



















where η ≈ 85%.

The desired input and output voltages, the switching frequency,

and the ripple current determine the required inductor value, as

shown in the following equation:

OUT

RIPPLE

OUT







In general, the ripple current is estimated as 30% of the

maximum dc input current (IIN), so the equation can be

rewritten as follows:

OUT







The maximum rated current of the inductor should be greater

than the peak inductor current (IPEAK). If the margin of these

currents is not enough, the inductor may be saturated due to

inductor value degradation, causing it to hit the current limit,

even in a lower load condition than expected.

The peak inductor current can be estimated as following:

IPEAK = IIN +

RIPPLE

= IIN + 0.15 × IIN = 1.15 × IIN

Another important specification to be considered is the parasitic

series resistance in the inductor: dc resistance (DCR). A larger

DCR may decrease efficiency performance, but a larger inductor

size has smaller DCR; therefore, the tradeoff between available

space on the PCB and device performance should be considered

carefully. The recommended inductors are shown in Table 20.

Output Capacitor Selection

The output capacitor maintains the output voltage and supplies

current to the load while the regulator switch is on. The value

and characteristics of the output capacitor significantly affect

the output voltage ripple and stability of the regulator. Use a low

ESR output capacitor; ceramic dielectric capacitors are preferable.

For very low ESR capacitors, such as ceramic capacitors, the

ripple current due to the capacitance is calculated as follows. In

continuous mode, because the capacitor discharges during the

on time (tON), the charge removed from the capacitor (QC) is the

load current multiplied by the on time.

Therefore, the output voltage ripple (ΔVOUT) is

OUT







where:

COUT is the output capacitance.

IL is the average inductor current.

Using the duty cycle (D) and switching frequency (fSW), users

can determine the on time by using the following equation:



The input (VIN) and output (VOUT) voltages determine the

switch duty cycle (D) by using the following equation:

OUT





Choose the output capacitor based on the following equation:

OUT











)

(

The minimum output capacitor required is a 10 μF, X5R capacitor;

however, to maintain stability across the entire operating range

and with component variations, one 22 μF, X5R capacitor is

recommended.

LAYOUT

As output power increases, lay out PCB traces and wires properly

among the amplifier, load, and power supply; a poor layout

increases voltage drops, consequently decreasing efficiency. A

good practice is to use short, wide PCB tracks to decrease

voltage drops and minimize inductance. It is also important to

minimize the use of vias for signal lines with fast edges on the

data transitions. In addition, do not place vias between the

small value decoupling capacitors and the pin. Connect the vias

to the ground or power planes on the far side of the capacitor

from the perspective of the pin.

SSM4567ACBZ-R7 Datenblatt(PDF) 26 Page - Analog Devices

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