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ADS131M08IPBSR Datenblatt(PDF) 24 Page - Texas Instruments

Teilenummer ADS131M08IPBSR
Bauteilbeschribung  ADS131M08 8-Channel, Simultaneously-Sampling, 24-Bit, Delta-Sigma ADC
PDF  118 Pages
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ADS131M08IPBSR Datenblatt(HTML) 24 Page - Texas Instruments

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The fast-settling filter exhibits wider bandwidth and less stop-band attenuation than the sinc3 filter. Consequently,
the noise performance when using the fast-settling filter is not as high as with the sinc3 filter. The first two
samples available from the ADS131M08 after a supply ramp or reset have the noise performance and frequency
response corresponding to the fast-settling filter as specified in the Electrical Characteristics table, whereas
subsequent samples have the noise performance and frequency response consistent with the sinc3 filter. See
the Fast Startup Behavior section for more details regarding the fast startup capabilities of the ADS131M08.
8.3.7.1.2 SINC3 and SINC3 + SINC1 Filter
The ADS131M08 selects the sinc3 filter path two conversion after power-up or device reset. For OSR settings of
128 to 1024 the sinc3 filter output directly feeds into the global-chop and calibration logic. For OSR settings of
2048 and higher the sinc3 filter is followed by a sinc1 filter. As shown in Table 8-3, the sinc3 filter operates at a
fixed OSR of 1024 in this case while the sinc1 filter implements the additional OSRs of 2 to 16. That means when
an OSR of 4096 (for example) is selected, the sinc3 filter operates at an OSR of 1024 and the sinc1 filter at an
OSR of 4.
The filter has infinite attenuation at integer multiples of the data rate except for integer multiples of fMOD. Like all
digital filters, the digital filter response of the ADS131M08 repeats at integer multiples of the modulator
frequency, fMOD. The data rate and filter notch frequencies scale with fMOD.
When possible, plan frequencies for unrelated periodic processes in the application for integer multiples of the
data rate such that any parasitic effect they have on data acquisition is effectively cancelled by the notches of
the digital filter. Avoid frequencies near integer multiples of fMOD whenever possible because tones in these
bands can alias to the band of interest.
The sinc3 and sinc3 + sinc1 filters for a given channel require time to settle after a channel is enabled, the
channel multiplexer or gain setting is changed, or a resynchronization event occurs. See the Synchronization
section for more details on resynchronization. Table 8-3 lists the settling times of the sinc3 and sinc3 + sinc1
filters for each OSR setting. The ADS131M08 does not gate unsettled data. Therefore, the host must account for
the filter settling time and disregard unsettled data if any are read. The data at the next DRDY falling edge after
the filter settling time listed in Table 8-3 has expired can be considered fully settled.
Table 8-3. Digital Filter Startup Times After Power-Up or Resynchronization
OSR (OVERALL)
OSR (SINC3)
OSR (SINC1)
SETTLING TIME (tCLKIN)
128
128
N/A
856
256
256
N/A
1112
512
512
N/A
1624
1024
1024
N/A
2648
2048
1024
2
4696
4096
1024
4
8792
8192
1024
8
16984
16384
1024
16
33368
8.3.7.2 Digital Filter Characteristic
Equation 6 calculates the z-domain transfer function of a sinc3 filter that is used for OSRs of 1024 and lower.
3
N
1
1
Z
H z
N 1
Z
(6)
where N is the OSR.
Equation 7 calculates the transfer function of a sinc3 filter in terms of the continuous-time frequency parameter f.
ADS131M08
SBAS950B – OCTOBER 2019 – REVISED FEBRUARY 2021
www.ti.com
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Product Folder Links: ADS131M08



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