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ADS131M08IPBSR Datenblatt(PDF) 11 Page - Texas Instruments |
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ADS131M08IPBSR Datenblatt(HTML) 11 Page - Texas Instruments |
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11 / 118 page ![]() 6.7 Switching Characteristics (continued) over operating ambient temperature range, DOUT load: 20 pF || 100 kΩ (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT(1) tREGACQ Register default acquisition time 5 µs 2.7 V ≤ DVDD ≤ 3.6 V tp(CSDO) Propagation delay time, CS falling edge to DOUT driven 50 ns tp(SCDO) Progapation delay time, SCLK rising edge to valid new DOUT 20 ns tp(CSDOZ) Propagation delay time, CS rising edge to DOUT high impedace 75 ns tw(DRH) Pulse duration, DRDY high 4 tCLKIN tw(DRL) Pulse duration, DRDY low 4 tCLKIN SPI timeout 32768 tCLKIN tPOR Power-on-reset time Measured from supplies at 90% to first DRDY rising edge 250 μs tREGACQ Register default acquisition time 5 µs (1) tCLKIN = 1/fCLKIN 6.8 Timing Diagrams CS SCLK DIN td(CSSC) tp(SCDO) tw(SCH) th(DI) td(SCCS) tc(SC) CLKIN tw(CLL) DOUT MSB MSB - 1 LSB + 1 LSB tw(CSDOZ) tp(CSDO) tw(CSH) tw(CLH) tw(SCL) tsu(DI) DRDY tw(DRH) tw(DRL) SPI settings are CPOL = 0 and CPHA = 1. CS transitions must take place when SCLK is low. Figure 6-1. SPI Timing Diagram CLKIN SYNC/RESET tw(SYL) tw(RSL) tsu(SY) Figure 6-2. SYNC/RESET Timing Requirements www.ti.com ADS131M08 SBAS950B – OCTOBER 2019 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: ADS131M08 |
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