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ADS131M08IPBSR Datenblatt(PDF) 55 Page - Texas Instruments |
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ADS131M08IPBSR Datenblatt(HTML) 55 Page - Texas Instruments |
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55 / 118 page ![]() 8.6.4 CLOCK Register (Address = 03h) [reset = FF0Eh] The CLOCK register is shown in Figure 8-29 and described in Table 8-17. Return to the Summary Table. Figure 8-29. CLOCK Register 15 14 13 12 11 10 9 8 CH7_EN CH6_EN CH5_EN CH4_EN CH3_EN CH2_EN CH1_EN CH0_EN R/W-1b R/W-1b R/W-1b R/W-1b R/W-1b R/W-1b R/W-1b R/W-1b 7 6 5 4 3 2 1 0 XTAL_DIS EXTREF_EN RESERVED OSR[2:0] PWR R/W-0b R/W-0b R/W-0b R/W-011b R/W-10b Table 8-17. CLOCK Register Field Descriptions Bit Field Type Reset Description 15 CH7_EN R/W 1b Channel 7 ADC enable 0b = Disabled 1b = Enabled (default) 14 CH6_EN R/W 1b Channel 6 ADC enable 0b = Disabled 1b = Enabled (default) 13 CH5_EN R/W 1b Channel 5 ADC enable 0b = Disabled 1b = Enabled (default) 12 CH4_EN R/W 1b Channel 4 ADC enable 0b = Disabled 1b = Enabled (default) 11 CH3_EN R/W 1b Channel 3 ADC enable 0b = Disabled 1b = Enabled (default) 10 CH2_EN R/W 1b Channel 2 ADC enable 0b = Disabled 1b = Enabled (default) 9 CH1_EN R/W 1b Channel 1 ADC enable 0b = Disabled 1b = Enabled (default) 8 CH0_EN R/W 1b Channel 0 ADC enable 0b = Disabled 1b = Enabled (default) 7 XTAL_DIS R/W 0b Crystal oscillator disable 0b = Enabled (default) 1b = Disabled 6 EXTREF_EN R/W 0b External reference enable 0b = Disabled (default) 1b = Enabled www.ti.com ADS131M08 SBAS950B – OCTOBER 2019 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 55 Product Folder Links: ADS131M08 |
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