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ADS131M08IPBSR Datenblatt(PDF) 103 Page - Texas Instruments |
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ADS131M08IPBSR Datenblatt(HTML) 103 Page - Texas Instruments |
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103 / 118 page ![]() Current (A) 0 10 20 30 40 50 60 70 80 90 100 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 D005 30° 60° -30° -60° Figure 9-9. Cumulative Reactive Energy % Error Versus Current 10 Power Supply Recommendations 10.1 CAP Pin Behavior The ADS131M08 core digital voltage of 1.8 V is created from an internal LDO from DVDD. The CAP pin outputs the LDO voltage created from the DVDD supply and requires an external bypass capacitor. When operating from DVDD > 2.7 V, place a 220-nF capacitor on the CAP pin to DGND. If DVDD ≤ 2 V, tie the CAP pin directly to the DVDD pin and decouple the star-connected pins using a 100-nF capacitor to DGND. 10.2 Power-Supply Sequencing The power supplies can be sequenced in any order but the analog and digital inputs must never exceed the respective analog or digital power-supply voltage limits. 10.3 Power-Supply Decoupling Good power-supply decoupling is important to achieve optimum performance. AVDD and DVDD must each be decoupled with a 1-µF capacitor. Place the bypass capacitors as close to the power-supply pins of the device as possible with low-impedance connections. Using multi-layer ceramic chip capacitors (MLCCs) that offer low equivalent series resistance (ESR) and inductance (ESL) characteristics are recommended for power-supply decoupling purposes. For very sensitive systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to the device pins can offer superior noise immunity. The use of multiple vias in parallel lowers the overall inductance and is beneficial for connections to ground planes. The analog and digital ground are recommended to be connected together as close to the device as possible. www.ti.com ADS131M08 SBAS950B – OCTOBER 2019 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 103 Product Folder Links: ADS131M08 |
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