SPRUG18 datasheet(115/214 Pages) TI

115 / 214 page

POR

XWRST

RESETSTAT

BootandDevice

ConfigurationPins

TMS320C6474

www.ti.com

SPRS552H

– OCTOBER 2008 – REVISED APRIL 2011

7.7.7

Reset Electrical Data/Timing

Table 7-20. Timing Requirements for Reset(1) (2)

(see Figure 7-7 and Figure 7-8)

NO.

MIN

MAX

UNIT

th(SUPPLY-POR)

Hold Time, POR low after supplies stable and input clocks valid

100

μs

tsu(XWRSTH-PORH)

Setup Time, XWRSTx high to POR high

100

μs

tw(XWRST)

Pulse Duration, XWRST low

24C

ts(BOOT)

Setup time, boot mode and configuration pins valid before POR

12C

or XWRST high

th(BOOT)

Hold time, bootmode and configuration pins valid after POR or

12C

XWRST high

(1)

If CORECLKSEL = 0, C = 1/SYSCLK(N|P) frequency, in ns.

(2)

If CORECLKSEL = 1, C = 1/ALTCORECLK(N|P) frequency, in ns.

Table 7-21. Switching Characteristics Over Recommended Operating Conditions During Reset(1)

(see Figure 7-7 and Figure 7-8)

NO.

MIN

MAX

UNIT

td(PORH-RSTATH)

Delay Time, POR high to RESETSTAT high

21000C

td(XWRSTH-RSTATH)

Delay Time, XWRST high to RESETSTAT high

35C

(1)

C = 1/CPU frequency, in ns.

Table 7-22. Switching Characteristics Over Recommended Operating Conditions for Warm Reset

(see Figure 7-9)

NO.

MIN

MAX

UNIT

tsu(PORH-XWRSTL)

Setup time, POR high to XWRST low

1.34

Figure 7-7. Power-On Reset Timing

Peripheral Information and Electrical Specifications

115

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