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WM8948ECS/R Datenblatt(PDF) 41 Page - Wolfson Microelectronics plc

Teilenummer WM8948ECS/R
Bauteilbeschribung  Stereo Low-Power CODEC with Video Buffer and Touch Panel Controller
PDF  189 Pages
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Hersteller  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8948ECS/R Datenblatt(HTML) 41 Page - Wolfson Microelectronics plc

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Production Data
WM8948
w
PD, May 2011, Rev 4.1
41
DYNAMIC RANGE CONTROL (DRC)
The dynamic range controller (DRC) is a circuit which can be enabled in the digital playback or digital
record path of the WM8948, depending upon the selected DSP mode. The function of the DRC is to
adjust the signal gain in conditions where the input amplitude is unknown or varies over a wide
range, e.g. when recording from microphones built into a handheld system.
The DRC can apply Compression and Automatic Level Control to the signal path. It incorporates
‘anti-clip’ and ‘quick release’ features for handling transients in order to improve intelligibility in the
presence of loud impulsive noises.
The DRC also incorporates a Noise Gate function, which provides additional attenuation of very low-
level input signals. This means that the signal path is quiet when no signal is present, giving an
improvement in background noise level under these conditions.
The DRC is enabled as described in Table 15. The audio signal path controlled by the DRC depends
upon the selected DSP Configuration mode - see “DSP Core” for details.
To remove any dc offsets from the input signal the ADC high pass filter must be enabled. The DRC
will not function correctly unless this filter is enabled.
Note that the ADC HPF bit in register R26(1Ah) bit 0 is NOT enabled by default but MUST be used if
DRC_ENA is enabled in register R29(1Dh) bit 7.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R29 (1Dh)
DRC Control 1
7
DRC_ENA
0
DRC Enable
0 = Disabled
1 = Enabled
Table 15 DRC Enable
DRC COMPRESSION / EXPANSION / LIMITING
The DRC supports two different compression regions, separated by a “Knee” (shown as “Knee1” in
Figure 18) at a specific input amplitude. In the region above the knee, the compression slope
DRC_HI_COMP applies; in the region below the knee, the compression slope DRC_LO_COMP
applies.
The DRC also supports a noise gate region, where low-level input signals are heavily attenuated.
This function can be enabled or disabled according to the application requirements. The DRC
response in this region is defined by the expansion slope DRC_NG_EXP.
For additional attenuation of signals in the noise gate region, an additional “knee” can be defined
(shown as “Knee2” in Figure 18). When this knee is enabled, this introduces an infinitely steep drop-
off in the DRC response pattern between the DRC_LO_COMP and DRC_NG_EXP regions.
The overall DRC compression characteristic in “steady state” (i.e. where the input amplitude is near-
constant) is illustrated in Figure 18.
Figure 18 DRC Response Characteristic



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