WM8948ECSSLASHR datasheet(69/189 Pages) WOLFSON

69 / 189 page

Production Data

WM8948

PD, May 2011, Rev 4.1

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R2 (02h)

Power

management

VMID_BUF_ENA

VMID Buffer Enable.

(The buffered VMID may be applied

to disabled input and output pins.)

0 = Disabled

1 = Enabled

R42 (2Ah)

Output ctrl

SPKR_VMID_OP

_ENA

Buffered VMID to SPKOUTR

Enable

0 = Disabled

1 = Enabled

SPKL_VMID_OP

_ENA

Buffered VMID to SPKOUTL Enable

0 = Disabled

1 = Enabled

LINER_VMID_OP

_ENA

Buffered VMID to LINEOUTR

Enable

0 = Disabled

1 = Enabled

LINEL_VMID_OP

_ENA

Buffered VMID to LINEOUTL

Enable

0 = Disabled

1 = Enabled

SPK_VROI

Buffered VREF to SPKOUTL /

SPKOUTR resistance (Disabled

outputs)

0 = approx 20k

1 = approx 1k

LINE_VROI

Buffered VREF to LINEOUTL /

LINEOUTR resistance (Disabled

outputs)

0 = approx 20k

1 = approx 1k

Table 42 Disabled Output Control

OUTPUT DISCHARGE CONTROL

The line outputs and speaker outputs can be actively discharged to GND through internal resistors if

desired. This is desirable at start-up in order to achieve a known output stage condition prior to

enabling the soft-start VMID reference voltage. This is also desirable in shut-down to prevent the

external connections from being affected by the internal circuits.

The individual control bits for discharging each audio output are described in Table 43.

WM8948ECS/R Datenblatt(PDF) 69 Page - Wolfson Microelectronics plc

WM8948ECS/R Datenblatt(HTML) 69 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL