| Datenblatt-Suchmaschine für elektronische Bauteile |
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WM8948ECS/R Datenblatt(PDF) 68 Page - Wolfson Microelectronics plc |
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WM8948ECS/R Datenblatt(HTML) 68 Page - Wolfson Microelectronics plc |
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68 / 189 page ![]() WM8948 Production Data w PD, May 2011, Rev 4.1 68 The VMID soft-start and fast start register controls are defined in Table 41. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R7 (07h) Additional control 11 VMID_FAST_ START 0 VMID (fast-start) Enable 0 = Disabled 1 = Enabled 8 STARTUP_BIAS_ ENA 0 Start-Up Bias Enable 0 = Disabled 1 = Enabled 7 BIAS_SRC 0 Bias Source select 0 = Normal bias 1 = Start-Up bias 6:5 VMID_RAMP [1:0] 00 VMID soft start enable / slew rate control 00 = Disabled 01 = Fast soft start 10 = Normal soft start 11 = Slow soft start Table 41 Soft Start Control POP SUPPRESSION CONTROL The WM8948 incorporates a number of features which are designed to suppress pops normally associated with Start-Up, Shut-Down or signal path control. These include the option to maintain an analogue output to VMID even when the output driver is disabled. In addition, there is the ability to actively discharge an output to GND. Note that, to achieve maximum benefit from these features, careful attention may be required to the sequence and timing of these controls. DISABLED OUTPUT CONTROL The line outputs and speaker outputs are biased to VMID in normal operation. In order to avoid audible pops caused by a disabled signal path dropping to GND, the WM8948 can maintain these connections at VMID when the relevant output stage is disabled. This is achieved by connecting a buffered VMID reference to the output. The buffered VMID reference is enabled by setting VMID_BUF_ENA. This is applied to any disabled outputs, provided that the respective _VMID_OP_ENA bit is also set. The output resistance can be either 1k Ω or 20kΩ, depending on the respective _VROI register bit. The disabled output control bits are described in Table 42. See “Output Signal Path” for details of how to disable any of the audio outputs. |
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