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WM8948ECS/R Datenblatt(PDF) 47 Page - Wolfson Microelectronics plc

Teilenummer WM8948ECS/R
Bauteilbeschribung  Stereo Low-Power CODEC with Video Buffer and Touch Panel Controller
PDF  189 Pages
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Hersteller  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8948ECS/R Datenblatt(HTML) 47 Page - Wolfson Microelectronics plc

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Production Data
WM8948
w
PD, May 2011, Rev 4.1
47
For example, if DRC DRC_DCY = 743ms/6dB, then the estimate decay time for 10%-90% taken
from the graph is 1.0s.
ANTI-CLIP CONTROL
The DRC includes an Anti-Clip feature to avoid signal clipping when the input amplitude rises very
quickly. This feature uses a feed-forward technique for early detection of a rising signal level. Signal
clipping is avoided by dynamically increasing the gain attack rate when required. The Anti-Clip
feature is enabled using the DRC_ANTICLIP bit.
Note that the feed-forward processing increases the latency in the input signal path. The DRC Anti-
Clip control is described in Table 21.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R29 (1Dh)
DRC Control 1
1
DRC_ANTICLIP
1
DRC Anti-clip Enable
0 = Disabled
1 = Enabled
Table 21 DRC Anti-Clip Control
Note that the Anti-Clip feature operates entirely in the digital domain. It cannot be used to prevent
signal clipping in the analogue domain nor in the source signal. Analogue clipping can only be
prevented by reducing the analogue signal gain or by adjusting the source signal.
The Anti-Clip and Quick Release features should not be used at the same time.
QUICK-RELEASE CONTROL
The DRC includes a Quick-Release feature to handle short transient peaks that are not related to the
intended source signal. For example, in handheld microphone recording, transient signal peaks
sometimes occur due to user handling, key presses or accidental tapping against the microphone.
The Quick Release feature ensures that these transients do not cause the intended signal to be
masked by the longer time constants of DRC_DCY.
The Quick-Release feature is enabled by setting the DRC_QR bit. When this bit is enabled, the DRC
measures the crest factor (peak to RMS ratio) of the input signal. A high crest factor is indicative of a
transient peak that may not be related to the intended source signal. If the crest factor exceeds the
level set by DRC_QR_THR, then the normal decay rate (DRC_DCY) is ignored and a faster decay
rate (DRC_QR_DCY) is used instead.
The DRC Quick-Release control bits are described in Table 22.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R29 (1Dh)
DRC Control 1
2
DRC_QR
1
DRC Quick-release Enable
0 = Disabled
1 = Enabled
R34 (22h)
DRC Control 6
3:2
DRC_QR_THR
[1:0]
00
DRC Quick-release threshold (crest
factor in dB)
00 = 12dB
01 = 18dB
10 = 24dB
11 = 30dB
1:0
DRC_QR_DCY
[1:0]
00
DRC Quick-release decay rate
(seconds/6dB)
00 = 0.725ms
01 = 1.45ms
10 = 5.8ms
11 = reserved
Table 22 DRC Quick-Release Control
The Anti-Clip and Quick Release features should not be used at the same time.



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