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WM8948ECS/R Datenblatt(PDF) 67 Page - Wolfson Microelectronics plc

Teilenummer WM8948ECS/R
Bauteilbeschribung  Stereo Low-Power CODEC with Video Buffer and Touch Panel Controller
PDF  189 Pages
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Hersteller  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8948ECS/R Datenblatt(HTML) 67 Page - Wolfson Microelectronics plc

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Production Data
WM8948
w
PD, May 2011, Rev 4.1
67
The Master Reference and Bias Control bits are defined in Table 40.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R7 (07h)
Additional
control
10
VMID_REF_SEL
0
VMID Source Select
0 = LDO supply (LDOVDD)
1 = LDO output (LDOVOUT)
9
VMID_CTRL
0
VMID Ratio control
Sets the ratio of VMID to the source
selected by VMID_REF_SEL
0 = 5/11
1 = 1/2
4
VMID_ENA
0
VMID Enable
0 = Disabled
1 = Enabled
R2 (02h)
Power
Management
1
3
BIAS_ENA
0
Master Bias Enable
0 = Disabled
1 = Enabled
1:0
VMID_SEL [1:0]
00
VMID Divider Enable and Select
00 = VMID disabled (for OFF mode)
01 = 2 x 50k
Ω divider (for normal
operation)
10 = 2 x 250k
Ω divider (for low
power standby)
11 = 2 x 5k
Ω divider (for fast start-
up)
Table 40 Reference Voltages and Master Bias Enable
A pop-suppressed start-up requires VMID to be enabled smoothly, without the step change normally
associated with the initial stage of the VMID capacitor charging. A pop-suppressed start-up also
requires the analogue bias current to be enabled throughout the signal path prior to the VMID
reference voltage being applied. The WM8948 incorporates pop-suppression circuits which address
these requirements.
An alternate bias current source (Start-Up Bias) is provided for pop-free start-up; this is enabled by
the STARTUP_BIAS_ENA register bit. The start-up bias is selected (in place of the normal bias)
using the BIAS_SRC bit. It is recommended that the start-up bias is used during start-up, before
switching back to the higher quality, normal bias.
A soft-start circuit is provided in order to control the switch-on of the VMID reference. The soft-start
control circuit offers two slew rates for enabling the VMID reference; these are selected and enabled
by VMID_RAMP. When the soft-start circuit is enabled prior to enabling VMID_SEL, the reference
voltage rises smoothly, without the step change that would otherwise occur. It is recommended that
the soft-start circuit and the output signal path be enabled before VMID is enabled by VMID_SEL.
A soft shut-down is provided, using the soft-start control circuit and the start-up bias current
generator. The soft shut-down of VMID is achieved by setting VMID_RAMP, STARTUP_BIAS_ENA
and BIAS_SRC to select the start-up bias current and soft-start circuit prior to setting VMID_SEL=00.
The internal LDO (described in the previous section) requires a voltage reference. Under normal
operating conditions, this is provided from VMID, via the register controls described in Table 40.
Note, however, that VMID is normally generated from the LDO output. Therefore, an alternative
voltage reference is required for start-up, which is not dependent on the LDO output. The
VMID_FAST_START bit enables a ‘Fast-Start’ reference powered from LDOVDD. This alternate
VMID can be selected as the LDO reference using the LDO_REF_SEL_FAST bit as described in
Table 37.



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