WM8948ECSSLASHR datasheet(98/189 Pages) WOLFSON

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WM8948

Production Data

PD, May 2011, Rev 4.1

When a pin is configured as a GPIO output, its level can be set to logic 0 or logic 1 using the

GPn_LVL field. When a pin is configured as a GPIO input, the logic level can be read from the

respective GPn_LVL bit. The GPIO output is inverted with respect to the GPn_LVL register when the

polarity bit GPn_POL is set; the equivalent is true of GPIO inputs also.

Internal pull-up and pull-down resistors may be enabled using the GPn_PULL fields; this allows

greater flexibility to interface with different signals from other devices.

Each of the GPIO pins is an input to the Interrupt control circuit and can be used to trigger an

Interrupt event. This may be configured as level-triggered or edge-triggered using the GPn_FN

registers. Edge detect raises an interrupt when the GPIO status changes; level detect asserts the

interrupt for as long as the GPIO status is asserted. See “Interrupts”.

An edge-triggered GPIO can be configured to trigger on a single edge or on both edges of the input

signal; this is selected using the GPn_INT_MODE registers. A level-triggered or single-edge-

triggered input may be configured using the GPn_POL registers to respond to a high level/edge

(when GPn_POL = 0) or a low level/edge (when GPn_POL = 1).

The GPIO control fields are defined in Table 61.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R11 (0Bh)

GPIO Config

GPIO_MODE

CIFMODE/GPIO3 pin configuration

0 = Pin configured as CIFMODE

1 = Pin configured as GPIO3

Note - when this bit is set to 1, it is

latched and cannot be reset until

Power-Off or Software Reset.

R12 (0Ch)

GPIO1

Control

GP1_DIR

GPIO1 Pin Direction

0 = Output

1 = Input

14:13

GP1_PULL [1:0]

GPIO1 pull-up / pull-down Enable

00 = no pull-up or pull-down

01 = pull-down

10 = pull-up

11 = reserved

GP1_INT_

MODE

GPIO1 Interrupt Mode

0 = GPIO interrupt is rising edge

triggered (if GP1_POL=0) or falling

edge triggered (if GP1_POL =1)

1 = GPIO interrupt is triggered on

rising and falling edges

GP1_POL

GPIO1 Polarity Select

0 = Non-inverted

1 = Inverted

GP1_LVL

GPIO1 level. Write to this bit to set

a GPIO output. Read from this bit to

read GPIO input level.

When GP1_POL is set, the register

contains the opposite logic level to

the external pin.

3:0

GP1_FN [3:0]

0000

GPIO1 Pin Function

(see Table 64 for details)

R13 (0Dh)

GPIO2

Control

GP2_DIR

GPIO2 Pin Direction

0 = Output

1 = Input

14:13

GP2_PULL [1:0]

GPIO2 pull-up / pull-down Enable

00 = no pull-up or pull-down

01 = pull-down

10 = pull-up

11 = reserved

WM8948ECS/R Datenblatt(PDF) 98 Page - Wolfson Microelectronics plc

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