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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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WM8948ECS/R Datenblatt(PDF) 116 Page - Wolfson Microelectronics plc |
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WM8948ECS/R Datenblatt(HTML) 116 Page - Wolfson Microelectronics plc |
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116 / 189 page  WM8948 Production Data w PD, May 2011, Rev 4.1 116 REGISTER MAP REG NAME 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DEFAULT R0 (0h) Software Reset/Chip ID 1 SW_RESET[15:0] 6229h R1 (1h) Chip ID 2 0 0 0 0 0 0 0 0 0 0 0 0 CHIP_REV[3:0] 0000h R2 (2h) Power management 1 0 0 INPPG AR_EN A INPPG AL_EN A ADCR _ENA ADCL_ ENA 0 0 DMIC_ ENA 0 0 MICB_ ENA BIAS_ ENA VMID_ BUF_E NA VMID_SEL[1:0] 0000h R3 (3h) Power management 2 OUTR _ENA OUTL_ ENA SPKR_ PGA_E NA SPKL_ PGA_E NA SPKR_ SPKV DD_E NA SPKL_ SPKV DD_E NA SPKR_ OP_M UTE SPKL_ OP_M UTE SPKR_ OP_E NA SPKL_ OP_E NA SPKR_ MIX_M UTE SPKL_ MIX_M UTE SPKR_ MIX_E NA SPKL_ MIX_E NA DACR _ENA DACL_ ENA 0330h R4 (4h) Audio Interface DACDATA_PU LL[1:0] FRAME_PULL[ 1:0] BCLK_PULL[1: 0] ADCR _SRC ADCL_ SRC DACR _SRC DACL_ SRC BCLK_ INV LRCLK _INV WL[1:0] FMT[1:0] 028Ah R5 (5h) Companding control 0 0 0 0 0 0 0 0 0 0 LOOP BACK 0 DAC_ COMP DAC_ COMP MODE ADC_ COMP ADC_ COMP MODE 0000h R6 (6h) Clock Gen control OSC_ CLK_E NA MCLK_PULL[1: 0] CLKO UT_SE L CLKOUT_DIV[1 :0] SYSCL K_ENA SYSCL K_SRC SYSCLK_DIV[2:0] TOCLK _ENA BCLK_DIV[2:0] MSTR 0106h R7 (7h) Additional control 0 0 0 0 VMID_ FAST_ START VMID_ REF_S EL VMID_ CTRL START UP_BI AS_EN A BIAS_ SRC VMID_RAMP[1: 0] VMID_ ENA SR[3:0] 000Dh R8 (8h) FLL Control 1 0 0 0 FLL_CLK_REF _DIV[1:0] FLL_OUTDIV[2:0] FLL_CTRL_RATE[2:0] FLL_FRATIO[2:0] FLL_F RAC FLL_E NA 0102h R9 (9h) FLL Control 2 FLL_K[15:0] 3127h R10 (Ah) FLL Control 3 0 FLL_N[9:0] 0 FLL_GAIN[3:0] 0104h R11 (Bh) GPIO Config 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE _GPIO 0000h R12 (Ch) GPIO1 Control GP1_D IR GP1_PULL[1:0] GP1_I NT_M ODE 0 GP1_P OL 0 0 0 0 GP1_L VL 0 GP1_FN[3:0] 8000h R13 (Dh) GPIO2 Control GP2_D IR GP2_PULL[1:0] GP2_I NT_M ODE 0 GP2_P OL 0 0 0 0 GP2_L VL 0 GP2_FN[3:0] 8000h R14 (Eh) GPIO3 Control GP3_D IR GP3_PULL[1:0] GP3_I NT_M ODE 0 GP3_P OL 0 0 0 0 GP3_L VL 0 GP3_FN[3:0] C000h R15 (Fh) GPIO4 Control GP4_D IR GP4_PULL[1:0] GP4_I NT_M ODE 0 GP4_P OL 0 0 0 0 GP4_L VL 0 GP4_FN[3:0] 8000h R16 (10h) System Interrupts TEMP_ INT GP4_I NT GP3_I NT GP2_I NT GP1_I NT TCHD ATA_I NT TCHP D_INT AUXA DC_IN T 0 0 0 0 0 0 0 LDO_U V_INT 0000h R17 (11h) Status Flags TEMP_ STS 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LDO_U V_STS 0000h R18 (12h) IRQ Config 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IM_IR Q 0001h R19 (13h) System Interrupts Mask IM_TE MP_IN T IM_GP 4_INT IM_GP 3_INT IM_GP 2_INT IM_GP 1_INT IM_TC HDAT A_INT IM_TC HPD_I NT IM_AU XADC_ INT 0 0 0 0 0 0 0 IM_LD O_UV_ INT 0000h R20 (14h) Control Interface 0 0 0 0 0 0 0 0 0 0 0 0 0 SPI_O D SPI_4 WIRE AUTO_ INC 0002h R21 (15h) DAC Control 1 0 0 0 0 0 0 0 DAC_ MUTE ALL 0 0 0 DAC_A UTOM UTE 0 0 DACR _DATI NV DACL_ DATIN V 0110h R22 (16h) DAC Control 2 0 0 0 0 0 0 0 0 0 0 0 DAC_V OL_RA MP 0 0 0 DAC_S B_FLT 0010h |
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