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SPRUG18 Datenblatt(PDF) 125 Page - Texas Instruments |
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SPRUG18 Datenblatt(HTML) 125 Page - Texas Instruments |
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125 / 214 page ![]() TMS320C6474 www.ti.com SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 7.8.3.6 PLL Controller Status Register The PLL controller status register (PLLSTAT) shows the PLL controller status. PLLSTAT is shown in Figure 7-16 and described in Table 7-30. 31 16 Reserved R-0 15 1 0 Reserved GOSTAT R-0 R-0 LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Figure 7-16. PLL Controller Status Register (PLLSTAT) [Hex Address: 029A 013C] Table 7-30. PLL Controller Status Register (PLLSTAT) Field Descriptions Bit Field Value Description 31:1 Reserved 0 Reserved. The reserved bit location is always read as 0. A value written to this field has no effect. 0 GOSTAT GO operation status. 0 GO operation is not in progress. SYSCLK divide ratios are not being changed. 1 GO operation is in progress. SYSCLK divide ratios are being changed. Copyright © 2008–2011, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 125 Submit Documentation Feedback Product Folder Link(s) :TMS320C6474 |
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