SPRUG18 datasheet(137/214 Pages) TI

137 / 214 page

TMS320C6474

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SPRS552H

– OCTOBER 2008 – REVISED APRIL 2011

7.11.2 I2C Peripheral Register Description(s)

The memory map of the I2C is shown in Table 7-39.

Table 7-39. I2C Registers

HEX ADDRESS

ACRONYM

02B0 4000

ICOAR

I2C Own Address Register

02B0 4004

ICIMR

I2C Interrupt Mask/Status Register

02B0 4008

ICSTR

I2C Interrupt Status Register

02B0 400C

ICCLKL

I2C Clock Low-Time Divider Register

02B0 4010

ICCLKH

I2C Clock High-Time Divider Register

02B0 4014

ICCNT

I2C Data Count Register

02B0 4018

ICDRR

I2C Data Receive Register

02B0 401C

ICSAR

I2C Slave Address Register

02B0 4020

ICDXR

I2C Data Transmit Register

02B0 4024

ICMDR

I2C Mode Register

02B0 4028

ICIVR

I2C Interrupt Vector Register

02B0 402C

ICEMDR

I2C Extended Mode Register

02B0 4030

ICPSC

I2C Prescaler Register

02B0 4034

ICPID1

I2C Peripheral Identification Register 1 [Value: 0x0000 0105]

02B0 4038

ICPID2

I2C Peripheral Identification Register 2 [Value: 0x0000 0005]

02B0 403C - 02B0 405C

Reserved

02B0 4060 - 02B0 407F

Reserved

02B0 4080 - 02B3 FFFF

Reserved

Peripheral Information and Electrical Specifications

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