SPRUG18 datasheet(139/214 Pages) TI

139 / 214 page

TMS320C6474

www.ti.com

SPRS552H

– OCTOBER 2008 – REVISED APRIL 2011

Table 7-41. Switching Characteristics for I2C Timings (1)

(see Figure 7-26)

NO.

STANDARD MODE

FAST MODE

UNIT

MIN

MAX

MIN

MAX

tc(SCL)

Cycle time, SCL

2.5

μs

td(SCLH-SDAL)

Delay time, SCL high to SDA low (for a

4.7

0.6

μs

repeated START condition)

td(SDAL-SCLL)

Delay time, SDA low to SCL low (for a START

0.6

μs

and a repeated START condition)

tw(SCLL)

Pulse duration, SCL low

4.7

1.3

μs

tw(SCLH)

Pulse duration, SCL high

0.6

μs

td(SDAV-SDLH)

Delay time, SDA valid to SCL high

250

100

ttw(SDLL-SDAV)

Valid time, SDA valid after SCL low (for PC

0.9

μs

bus devices)

Tw(SDAH)

Pulse duration, SDA high between STOP and

4.7

1.3

μs

START conditions

tr(SDA)

Rise time, SDA

1000 20 + 0.1Cb

(1)

300

tr(SDL)

Rise time, SCL

1000 20 + 0.1Cb

(1)

300

tf(SDA)

Fall time, SDA

300 20 + 0.1Cb

(1)

300

tf(SCL)

Fall time, SCL

300 20 + 0.1Cb

(1)

300

td(SCLH-SDAH)

Delay time, SCL high to SDA high (for STOP

0.6

μs

condition)

Capacitance for each I2C pin

(1)

Cb = total capacitance of one bus line, in pF. If mixed with HS-mode devices, faster fall-times are allowed.

Figure 7-26. I2C Transmit Timings

Peripheral Information and Electrical Specifications

139

Submit Documentation Feedback

Product Folder Link(s) :TMS320C6474

SPRUG18 Datenblatt(PDF) 139 Page - Texas Instruments

SPRUG18 Datenblatt(HTML) 139 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL