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MCP3912 Datenblatt(PDF) 4 Page - Microchip Technology

Teilenummer MCP3912
Bauteilbeschribung  3V Four-Channel Analog Front End
PDF  82 Pages
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Hersteller  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3912 Datenblatt(HTML) 4 Page - Microchip Technology

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MCP3912
DS20005348A-page 4
 2014 Microchip Technology Inc.
Integral Nonlinearity
INL
5
ppm
Measurement Error
ME
0.1
%
Measured with a 10,000:1
dynamic range
(from 600 mVPeak to 60 µVPeak),
AVDD =DVDD =3V,
measurement points averaging
time: 20 seconds, measured on
each channel pair (CH0/1,
CH2/3)
Differential Input
Impedance
ZIN
232
k
G = 1, proportional to 1/AMCLK
142
k
G = 2, proportional to 1/AMCLK
72
k
G = 4, proportional to 1/AMCLK
38
k
G = 8, proportional to 1/AMCLK
36
k
G = 16, proportional to 1/AMCLK
33
k
G = 32, proportional to 1/AMCLK
Signal-to-Noise and
Distortion Ratio (Note 1)
SINAD
92
93.5
dB
Total Harmonic Distortion
(Note 1)
THD
-107
-103
dBc
Includes the first 35 harmonics
Signal-to-Noise Ratio
(Note 1)
SNR
92
94
dB
Spurious Free Dynamic
Range (Note 1)
SFDR
112
dBFS
Crosstalk (50, 60 Hz)
CTALK
-122
dB
Note 4
AC Power
Supply Rejection
AC PSRR
-73
dB
AVDD =DVDD = 3V + 0.6VPP
50/60 Hz, 100/120 Hz
DC Power
Supply Rejection
DC PSRR
-73
dB
AVDD = DVDD = 2.7V to 3.6V
DC Common
Mode Rejection
DC CMRR
-100
dB
VCM from -1V to +1V
TABLE 1-1:
ANALOG SPECIFICATIONS (CONTINUED)
Electrical Specifications:
Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz;
PRE<1:0> = 00
; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER<1:0> = 11; BOOST<1:0> = 10, VCM =0V;
TA = -40°C to +125°C; VIN = -0.5 dBFS @ 50/60 Hz on all channels.
Characteristic
Sym.
Min.
Typ.
Max.
Units
Conditions
Note 1:
Dynamic Performance specified at -0.5 dB below the maximum differential input value,
VIN =1.2 VPP = 424 mVRMS @ 50/60 Hz, VREF = 1.2V. See Section 4.0 “Terminology And Formulas” for definition.
This parameter is established by characterization and not 100% tested.
2:
For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 0000
,
RESET<3:0> = 0000
, VREFEXT = 0, CLKEXT = 0.
3:
For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 1111
, VREFEXT = 1,
CLKEXT = 1.
4:
Measured on one channel versus all others channels. The average of crosstalk performance over all channels
(see Figure 2-32 for individual channel performance).
5:
Applies to all gains. Offset and gain errors depend on PGA gain setting, see typical performance curves for typical
performance.
6:
Outside of this range, ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to
the part with no damage.
7:
For proper operation and for optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in
Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the prescaler
settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.
8:
This parameter is established by characterization and not 100% tested.



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