MCP3912 datasheet(6/82 Pages) MICROCHIP

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MCP3912

DS20005348A-page 6

 2014 Microchip Technology Inc.

1.2

Serial Interface Characteristics

Operating Current, Analog

(Note 2)

IDD,A

—

2.8

BOOST<1:0> = 00

—

3.4

4.5

BOOST<1:0> = 01

—

4.7

6.4

BOOST<1:0> = 10

—

8.1

11.8

BOOST<1:0> = 11

Operating Current, Digital

IDD,D

—

0.28

0.6

MCLK = 4 MHz,

proportional to MCLK (Note 2)

—

1.1

—

MCLK = 16 MHz,

proportional to MCLK (Note 2)

Shutdown Current, Analog

IDDS,A

—0.01

µA

AVDD pin only (Note 3) (Note 8)

Shutdown Current, Digital

IDDS,D

—0.01

µA

DVDD pin only (Note 3) (Note 8)

Pull-down Current on

OSC2 Pin (External Clock

mode only)

IOSC2

—

µA

CLKEXT = 1

TABLE 1-2:

SERIAL DC CHARACTERISTICS

Electrical Specifications:

Unless otherwise indicated, all parameters apply at DVDD = 2.7 to 3.6 V,

TA = -40°C to +125°C, CLOAD = 30 pF, applies to all digital I/O.

Characteristic

Sym.

Min.

Typ.

Max.

Units

Conditions

High-Level Input Voltage

VIH

0.7 DVDD

—

Schmitt-Triggered

Low-Level Input Voltage

VIL

——

0.3 DVDD

Schmitt-Triggered

Input Leakage Current

ILI

——

±1

µA

CS = DVDD,

VIN = DGND to DVDD

Output Leakage Current

ILO

——

±1

µA

CS = DVDD,

VOUT = DGND or DVDD

Hysteresis Of

Schmitt-Trigger Inputs

VHYS

—500

—

DVDD = 3.3V only, Note 2

Low-Level Output Voltage

VOL

——

0.2 DVDD

VIOL = +1.7 mA

Note 1:

This parameter is periodically sampled and not 100% tested.

This parameter is established by characterization and not production tested.

TABLE 1-1:

ANALOG SPECIFICATIONS (CONTINUED)

Electrical Specifications:

Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz;

PRE<1:0> = 00

; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER<1:0> = 11; BOOST<1:0> = 10, VCM =0V;

TA = -40°C to +125°C; VIN = -0.5 dBFS @ 50/60 Hz on all channels.

Characteristic

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1:

Dynamic Performance specified at -0.5 dB below the maximum differential input value,

VIN =1.2 VPP = 424 mVRMS @ 50/60 Hz, VREF = 1.2V. See Section 4.0 “Terminology And Formulas” for definition.

This parameter is established by characterization and not 100% tested.

For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 0000

RESET<3:0> = 0000

, VREFEXT = 0, CLKEXT = 0.

For these operating currents, the following configuration bit settings apply: SHUTDOWN<3:0> = 1111

, VREFEXT = 1,

CLKEXT = 1.

Measured on one channel versus all others channels. The average of crosstalk performance over all channels

(see Figure 2-32 for individual channel performance).

Applies to all gains. Offset and gain errors depend on PGA gain setting, see typical performance curves for typical

performance.

Outside of this range, ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to

the part with no damage.

For proper operation and for optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in

Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the prescaler

settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.

This parameter is established by characterization and not 100% tested.

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