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CC1020-RTR1 Datenblatt(PDF) 38 Page - Texas Instruments

Teilenummer CC1020-RTR1
Bauteilbeschribung  Single Chip Low Power RF Transceiver for Narrowband Systems
PDF  91 Pages
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CC1020-RTR1 Datenblatt(HTML) 38 Page - Texas Instruments

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CC1020
SWRS046
Page 38 of 92
frequency hopping. This means that bit
synchronization can be maintained from
hop to hop.
VGA_WAIT determines the time to hold
the present bit synchronization and RSSI
levels after changing VGA gain. This
feature is useful to avoid AGC operation
during the settling of transients after a
VGA gain change. Some transients are
expected due to DC offsets in the VGA.
At the sensitivity limit, the VGA gain is set
by VGA_SETTING. In order to optimize
selectivity, this gain should not be set
higher than necessary. The SmartRF®
Studio software gives the settings for
VGA1 – VGA4 registers. For reference,
the following method can be used to find
the AGC settings:
1. Disable AGC and use maximum LNA2 gain by
writing BFh to the VGA2 register. Set minimum
VGA gain by writing to the VGA3 register with
VGA_SETTING = 0.
2. Apply no RF input signal, and measure ADC noise
floor by reading the RSSI register.
3. Apply no RF input signal, and write VGA3 register
with increasing VGA_SETTING value until the
RSSI register value is approximately 4 larger than
the value read in step 2. This places the front-end
noise floor around 6 dB above the ADC noise floor.
4. Apply an RF signal with strength equal the desired
carrier sense threshold. The RF signal should
preferably be modulated with correct Baud rate and
deviation. Read the RSSI register value, subtract 8,
and write to CS_LEVEL in the VGA4 register. Vary
the RF signal level slightly and check that carrier
sense indication (bit 3 in STATUS register)
switches at the desired input level.
5. If desired, adjust the VGA_UP and VGA_DOWN
settings according to the explanation in Figure 18.
6. Enable AGC and select LNA2 gain change level.
Write 55h to VGA2 register if the resulting
VGA_SETTING>10. Otherwise, write 45h to VGA2.
Modify AGC_AVG in the above VGA2 value if
faster carrier sense and AGC settling is desired.
RSSI Level
0
Zero level depends on front-end settings and VGA_SETTING
value.
CS_LEVEL+8
VGA_UP
VGA_DOWN+3
(signal strength, 1.5dB/step)
Carrier sense is turned on here.
AGC increases gain if below this
level (unless at maximum).
AGC decreases gain if above
this level (unless at minimum).
To set CS_LEVEL, subtract 8 from RSSI readout with RF
input signal at desired carrier sense level.
Note that the AGC works with "raw" filter output signal
strength, while the RSSI readout value is compensated for
VGA gain changes by the AGC.
The AGC keeps the signal strength in this range. Minimize
VGA_DOWN for best selectivity, but leave some margin to
avoid frequent VGA gain changes during reception.
The AGC keeps the signal strength above carrier sense level
+ VGA_UP. Minimize VGA_UP for best selectivity, but
increase if first VGA gain reduction occurs too close to the
noise floor.
Figure 18. Relationship between RSSI, carrier sense level, and AGC settings CS_LEVEL,
VGA_UP and VGA_DOWN
12.9. AGC Settling
After turning on the RX chain, the following
occurs:
A) The AGC waits 16-128 ADC_CLK
(1.2288 MHz) periods, depending on the
VGA_FREEZE
setting
in
the
VGA1
register, for settling in the analog parts.
B) The AGC waits 16-48 FILTER_CLK
periods, depending on the VGA_WAIT
setting in the VGA1 register, for settling in
the analog parts and the digital channel
filter.
C) The AGC calculates the RSSI value as
the average magnitude over the next 2-16



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