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WM8948ECS/R Datenblatt(PDF) 104 Page - Wolfson Microelectronics plc

Teilenummer WM8948ECS/R
Bauteilbeschribung  Stereo Low-Power CODEC with Video Buffer and Touch Panel Controller
PDF  189 Pages
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Hersteller  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8948ECS/R Datenblatt(HTML) 104 Page - Wolfson Microelectronics plc

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WM8948
Production Data
w
PD, May 2011, Rev 4.1
104
SELECTION OF CONTROL INTERFACE MODE
The WM8948 Control Interface can be configured for I2C mode or SPI modes using the
CIFMODE/GPIO3 pin at power-up. The mode selection is as described in Table 67.
CIFMODE/GPIO3
INTERFACE FORMAT
Low
2 wire
High
3- or 4- wire
Table 66 Control Interface Mode Selection
After the Control Interface Mode has been configured, the MODE_GPIO register bit should be set in
order to latch the selection and to allow GPIO functions to be supported on the CIFMODE/GPIO3
pin. After the MODE_GPIO register bit has been set, the Control Interface mode selection will remain
latched until a Software Reset or Power On Reset occurs. See “General Purpose Input / Output” for
details.
In 2-wire (I2C) Control Interface mode, Auto-Increment mode may be selected. This enables multiple
write and multiple read operations to be scheduled faster than is possible with single register
operations. The auto-increment option is enabled when the AUTO_INC register bit is set. This bit is
defined in Table 67. Auto-increment is disabled by default.
In SPI modes, 3-wire or 4-wire operation may be selected using the SPI_4WIRE register bit. In 3-wire
mode, register readback is provided using the bi-directional pin SDA. In 4-wire mode, register
readback is provided using SDOUT. The SDOUT pin may be configured as CMOS or as Open Drain
using the SPI_OD bit. In 3-wire mode the SDA pin may be configured as CMOS or as Open Drain
using the SPI_OD bit. If the open drain option is selected (SPI_OD = 1) then an external pull-up
resistor is required on the SDOUT or SDA output pin.
The Control Interface configuration bits are described in Table 67.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R20 (14h)
Control
Interface
2
SPI_OD
0
SDOUT pin configuration
(applies to 3-wire and 4-wire mode
only)
0 = SDOUT output is CMOS
1 = SDOUT output is open drain
1
SPI_4WIRE
1
SPI control mode select
0 = 3-wire using bidirectional SDA
1 = 4-wire using SDOUT
0
AUTO_INC
0
Enables address auto-increment
(applies to 2-wire / I2C mode only)
0 = Disabled
1 = Enabled
Table 67 Control Interface Configuration
2-WIRE (I2C) CONTROL MODE
In 2-wire mode, the WM8948 is a slave device on the control interface; SCLK is a clock input, while
SDA is a bi-directional data pin. To allow arbitration of multiple slaves (and/or multiple masters) on
the same interface, the WM8948 transmits logic 1 by tri-stating the SDA pin, rather than pulling it
high. An external pull-up resistor is required to pull the SDA line high so that the logic 1 can be
recognised by the master.
In order to allow many devices to share a single 2-wire control bus, every device on the bus has a
unique 7-bit device ID (this is not the same as the 15-bit address of each register in the WM8948).
The WM8948 device ID is 34h. The LSB of the device ID is the Read/Write bit; this bit is set to logic
1 for “Read” and logic 0 for “Write”.



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