PC87338 datasheet(64/221 Pages) NSC

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Bits 3-0 - SIRQI1 Mapping

When it controls its pin, SIRQI1 can be routed onto

one of the following ISA interrupts: IRQ7-3,

IRQ12-9. See Table 27.

Unpredictable results when invalid values are writ-

ten. IRQ5 and IRQ12 can not always be config-

ured. For more details, refer to Section 6.

It is the software‘s responsibility to route all inter-

rupt sources onto the ISA interrupts correctly.

TABLE 27. SIRQI1 Plug and Play Interrupt Map-

ping

Bit 4 - Invert SIRQI1

This bit inverts the interrupt selected by bits 3-0.

0 - SIRQI1 not inverted. IRQx = SIRQI1.

1 - SIRQI1 inverted. IRQx = SIRQI1.

Bit 5 - SIRQI1 Status

This bit is read-only. It holds the value of SIRQI1,

when SIRQI1 controls its pin.

Bits 7, 6 - Select IRQ15, SIRQI1 or DRQ3

Upon reset, these bits are initialized to 00.

TABLE 28. SIRQ1 Interrupt Settings

2.3.34 System IRQ Input 2 Configuration

This register allows configuration of the SIRQI2 sig-

nal. See Table 30. It is initialized to 00x00000 during

reset.

FIGURE 36. SIRQ2 Register Bitmap

Bits 3-0 - SIRQI2 Mapping

When it controls its pin, SIRQI2 can be routed onto

one of the following ISA interrupts: IRQ7-3,

IRQ12-9 and IRQ15. See Table 29.

Unpredictable results when invalid values are writ-

ten. IRQ5, IRQ12 and IRQ15 can not always be

configured. For more details, refer to Section 6.

It is the software‘s responsibility to route all inter-

rupt sources onto the ISA interrupts correctly.

Bit 3Bit 2Bit 1

Bit 0

Interrupt

000

Disable

000

Invalid

001

Invalid

001

IRQ3

010

IRQ4

010

IRQ5

011

IRQ6

011

IRQ7

100

Invalid

100

IRQ9

101

IRQ10

101

IRQ11

110

IRQ12

110

Invalid

111

Invalid

111

Invalid

Bit 7

Bit 6

Selected Interrupt

Connected to Pin

IRQ15

SIRQI1

DRQ3

Reserved

Select MSEN1, DRATE1, CS0 or SIRQI2

543

Reset

Required

(SIRQ2)

System IRQ Input 2

Index 4Dh

Configuration Register

Invert SIRQI2

SIRQI2 Status

SIRQI2 Mapping

PC87338 Datenblatt(PDF) 64 Page - National Semiconductor (TI)

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