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PC87338 Datenblatt(PDF) 68 Page - National Semiconductor (TI) |
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PC87338 Datenblatt(HTML) 68 Page - National Semiconductor (TI) |
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68 / 221 page ![]() 68 www.national.com Bit 0 - Select DRATE1, MSEN1, CS0, SIRQI2 or DACK3 When the pin is assigned for DACK3, MSEN1 is masked to 1. 0 - DRATE1, MSEN1, CS0 or SIRQI2 may use the pin, according to bits 7 and 6 of the SIRQ2 register. (Default) 1 - DACK3 may use the pin. Bit 1 - Select DRV2, PNF, DR23, SIRQI3 or IRSL2/ ID2 DRV2 and PNF are masked to 1, when the pin is assigned for IRSL2. 0 - DRV2, PNF, DR23 or SIRQI3 may use the pin, according to bits 7 and 6 of SIRQ3 register. 1 - IRSL2 /ID2 may use the pin (ID2 is only in PC97338). Bit 2 - Select MTR1, IDLE or IRSL2/ ID2 0 - MTR1 or IDLE may use the pin, according to bit 4 of PMC register. 1 - IRSL2 /ID2 uses the pin (ID2 is only in PC97338). Bit 3 - Select IRQ12, IRRX2, IRSL0/ ID0 This bit is ignored in 11-bit address mode. 0 - IRQ12 may use the pin. 1 - IRRX2 or IRSL0 /ID0 may use the pin, accord- ing to SCC2 extended registers ( ID0 is only in PC97338). Bit 7-4 - Reserved These bits are reserved. 2.3.38 Clock Control Register (CLK), Index 51h Upon power on (when VDD is applied), all bits of this register are initialized to 0. This register is not reset by the MR pin. FIGURE 40. CLK Register Bitmap Bits 1,0 - SuperI/O Chip Clock Source These bits define the clock source for the SuperI/O chip that is fed via the X1 pin. Upon power on, these bits are read or write. Once they are written, they become read-only bits. 00 - The clock source is the on-chip clock multi- plier fed by 14.318 MHz. 01 - The clock source is the on-chip clock multi- plier fed by 24 MHz. 10 - The clock source is 48 MHz. 11 - Reserved. Bit 2 - Clock Multiplier Enable Bits 2 and 3 of the PCR register may affect this bit. 0 - On chip clock multiplier is disabled. 1 - On chip clock multiplier is enabled. Bit 3 - Valid Multiplier Clock Status Read only. 0 - On-chip clock (clock multiplier output) is fro- zen. 1 - On-chip clock (clock multiplier output) is sta- ble and toggling. Bits 7-4 - Reserved These bits are reserved. 2.3.39 Manufacturing Test Register (MTEST), Index 52h This register controls manufacturing tests. It exist only in the PC97338 version. 76 543 21 0 Register (CLK) Reset Required Index 51h 0 0 0 0 0 0 Clock Control Reserved Reserved Reserved Clock Multiplier Enable Valid Clock Multiplier Status Reserved SuperI/O Chip Clock Source |
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