| Datenblatt-Suchmaschine für elektronische Bauteile |
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PC87338 Datenblatt(PDF) 75 Page - National Semiconductor (TI) |
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PC87338 Datenblatt(HTML) 75 Page - National Semiconductor (TI) |
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75 / 221 page ![]() 75 www.national.com 3.3.2 Status Register A (SRA), Offset 000 Status Register A (SRA) monitors the state of the IRQ6 signal and some of the disk interface signals. SRA is a read-only register that is valid only in PS/2 mode. SRA can be read at any time while PS/2 mode is ac- tive. In PC-AT mode, all bits are in TRI-STATE during a microprocessor read. FIGURE 45. SRA Register Bitmap Bit 0 - Head Direction This bit indicates the direction of the head of the Floppy Disk Drive (FDD). Its value is the inverse of the value of the DIR interface output signal. 0 - DIR is not active, i.e., the head of the FDD steps outward. (Default) 1 - DIR is active, i.e., the head of the FDD steps inward. Bit 1 - Write Protect (WP) This bit indicates whether or not the selected Flop- py Disk Drive (FDD) is write protected. Its value re- flects the status of the WP disk interface input signal. 76 54 321 0 Reset Required 0 0 0 0 0 0 0 0 Main Status Register (MSR) Offset 100 Drive 2 Busy Non-DMA Execution Data I/O Direction RQM Drive 1 Busy Drive 3 Busy Command in Progress Drive 0 Busy 76 54 321 0 Reset Required 0 1 0 0 0 0 0 0 Data Rate Select Register (DSR) Offset 100 Precompensation Delay Select Undefined Low Power Software Reset DRATE1 DRATE0 76 54 321 0 Reset Required Data Register (FIFO) Offset 101 Data 76 54 321 0 Reset Required 1 1 1 1 1 Digital Input Register (DIR) Offset 111 DRATE1 Status DSKCHG DRATE0 Status Reserved High Density PS/2 Mode Only 76 54 321 0 Reset Required 0 1 0 0 0 0 0 0 Configuration Control Register (CCR) Offset 111 Reserved DRATE1 DRATE0 76 54 321 0 Reset Required 0 0 0 0 Status Register A (SRA) Offset 000 INDEX TRK0 Step DRV2 IRQ6 Pending Head Direction WP Head Select |
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