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PC87338 Datenblatt(PDF) 72 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Teilenummer PC87338
Bauteilbeschribung  ACPI 1.0 and PC98/99 Compliant SuperI/O
PDF  221 Pages
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Hersteller  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87338 Datenblatt(HTML) 72 Page - National Semiconductor (TI)

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FIGURE 44. Perpendicular Recording Drive
Read/Write Head and Pre-Erase Head
Unlike conventional disk drives which have only a
read/write head, the 2.88 MB drive has both a pre-
erase head and read/write head. With conventional
disk drives, the read/write head, itself, can rewrite the
disk without problems. 2.88 MB drives need a pre-
erase head to erase the magnetic flux on the disk sur-
face before the read/write head can write to the disk
surface. The pre-erase head is activated during disk
write operations only, i.e. FORMAT and WRITE
DATA commands.
In 2.88 MB drives, the pre-erase head leads the
read/write head by 200
µm, which translates to 38
bytes at 1 Mbps (19 bytes at 500 Kbps).
For both conventional and perpendicular drives,
WGATE is asserted with respect to the position of the
read/write head. With conventional drives, this means
that WGATE is asserted when the read/write head is
located at the beginning of the preamble to the data
field.
With 2.88 MB drives, since the preamble must be
erased before it is rewritten, WGATE should be as-
serted when the pre-erase head is located at the be-
ginning of the preamble to the data field. This means
that WGATE should be asserted when the read/write
head is at least 38 bytes (at 1 Mbps) before the pre-
amble. Tables 49 and 50 on page 104 show how the
perpendicular format affects gap 2 and, consequent-
ly, WGATE timing, for different data rates.
Because of the 38-byte spacing between the
read/write head and the pre-erase head at 1 Mbps,
the gap 2 length of 22 bytes used in the standard IBM
disk format is not long enough. The format standard
for 2.88 MB drives at 1 Mbps called the Perpendicular
Format, increases the length of gap 2 to 41 bytes. See
Figure 58 on page 99.
The PERPENDICULAR MODE command puts the
Floppy Disk Controller (FDC) into perpendicular re-
cording mode, which allows it to read and write per-
pendicular media. Once this command is invoked, the
read, write and format commands can be executed in
the normal manner. The perpendicular mode of the
FDC will work at all data rates, adjusting the format
and write data parameters accordingly. See “The
PERPENDICULAR MODE Command” on page 104
for more details.
3.2.4
Data Rate Selection
The FDC sets the data rate in two ways. For PC com-
patible software, the Configuration Control Register
(CCR) at address 3F7h programs the data rate for the
FDC. The lower bits D1 and D0 in the CCR set the
data rate. The other bits should be set to zero. See
Table 40 on page 82 to see how to encode the de-
sired data rate.
The lower two bits of the Data rate Select Register
(DSR) at address 4 can also set the data rate. These
bits are encoded like the corresponding bits in the
CCR. The remainder of the bits in the DSR have other
functions. See the description of the DSR in Section
3.3.7 on page 82 for more details.
The data rate is determined by the last value written
to either the CCR or the DSR. Either the CCR or the
DSR can override the data rate selection of the other
register. When the data rate is selected, the micro-en-
gine and data separator clocks are scaled appropri-
ately. Also, the DRATE0 and DRATE1 output signals
will reflect the state of the data selection bits that were
last written to either the CCR or the DSR.
3.2.5
Write Precompensation
Write precompensation is a way of preconditioning
the WDATA output signal to adjust for the effects of bit
shift on the data as it is written to the disk surface.
Data that is subject to bit shift is much harder to read
by a data separator, and can cause soft read errors.
Bit shift is caused by the magnetic interaction of data
bits as they are written to the disk surface. It shifts
these data bits away from their nominal position in the
serial MFM (MFM or FM in the PC98338) data pattern.
Write precompensation predicts where bit shift could
occur within a data pattern. It then shifts the individual
data bits early, late, or not at all so that when they are
written to the disk, the shifted data bits will be back in
their nominal position.
The FDC supports software programmable write pre-
compensation. Upon power up, the default write pre-
compensation values shown in Table 42 on page 82,
will be used. In addition, the default starting track
number for write precompensation is track zero
You can use the DSR to change the write precompen-
sation using any of the values in Table 41 on page 82.
Also, the starting track number for write precompen-
sation can be changed with the CONFIGURE com-
mand.
200 mm
(38 bytes @ 1 Mbps)
End of
ID Field
Data Field
Preamble
Intersector
Read/
Pre-
Head
Head
Write
Gap 2
= 41 x 4Eh
Erase



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