PC87338 datasheet(95/221 Pages) NSC

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3.6.3

The DUMPREG Command

The DUMPREG command supports system run-time

diagnostics, and application software development

and debugging.

DUMPREG has a one-byte command phase (the op-

code) and a 10-byte result phase, which returns the

values of parameters set in other commands. See the

commands that set each parameter for a detailed de-

scription of the parameter.

Command Phase

Execution Phase

Internal registers read.

Result Phase

After a hardware or software reset, parameters in this

phase are reset to their default values. Some of these

parameters are unaffected by a software reset, de-

pending on the state of the LOCK bit.

See the command that determines the setting for the

bit or field for details.

First through Fourth Result Phase Bytes, Bits 7-0,

Present Track Number (PTR) Drives 3-0

Each of these bytes contains either the internal 8-

bit track number or the least significant byte of the

12-bit track number of the corresponding logical

disk drive.

Fifth and Sixth Result Phase Bytes, Bits 7-0,

Step Rate Time, Motor Off Time, Motor On Time

and DMA

These fields are all set by the SPECIFY command.

See Section 3.6.21 on page 116.

Seventh Result Phase Byte -

Sectors Per Track or End of Track (EOT)

This byte varies depending on what commands

have been previously executed.

If the last command issued was a FORMAT

TRACK command, and no read or write com-

mands have been issued since then, this byte con-

tains the sectors per track value.

If a read or a write command was executed more

recently than a FORMAT TRACK command, this

byte specifies the number of the sector at the End

of the Track (EOT).

Eighth Result Phase Byte

Bit 7 - LOCK

This bit controls how the other bits in this com-

mand respond to a software reset. See page 100.

The value of this is determined by bit 7 of the op-

code of the LOCK command.

0 -Bits in this command are set to their default

values after a software reset. (Default)

1 - Bits in this command are unaffected by a soft-

ware reset.

Bits 5-0 - DC3-0, GDC

Bits 5-0 of the second command phase byte of the

PERPENDICULAR MODE command set bits 5-0

of this byte. See page 105.

Ninth and Tenth Result Phase Bytes

These bytes reflect the values in the third and

fourth command phase bytes of the CONFIGURE

command. See page 94.

7654

3210

0000

1110

7654

3210

Byte of Present Track Number (PTR) Drive 0

Byte of Present Track Number (PTR) Drive 1

Byte of Present Track Number (PTR) Drive 2

Byte of Present Track Number (PTR) Drive 3

Step Rate Time (SRT)

Delay After Processing

Delay Before Processing

DMA

Sectors per Track or End of Track (EOT) Sector #

LOCK

DC3

DC2

DC1

DC0

GDC

EIS

FIFO POLL

THRESH

Precompensation Track Number (PRETRK)

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