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AD9640/PCB Datenblatt(PDF) 30 Page - Analog Devices |
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AD9640/PCB Datenblatt(HTML) 30 Page - Analog Devices |
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30 / 41 page ![]() AD9640 Preliminary Technical Data Rev. PrD | Page 30 of 41 BUILT-IN SELF-TEST (BIST) AND OUTPUT TEST The AD9640 includes built-in test features to enable verification of the integrity of each channel as well as to facilitate board level debugging. A BIST (built-in self-test) feature is included which verifies the integrity of the digital data path of the AD9640. Various output test options are also provided to place predictable values on the outputs of the AD9640. BUILT IN SELF TEST (BIST) The BIST is a thorough test of the digital portion of the selected AD9640 signal path. When enabled, the test runs from a user selectable internal source (PN or sine) through the digital data path starting at the ADC block output. The BIST sequence will run for 256 cycles and stop. The BIST signature value for channel A or B will be placed in registers 0x024 and 0x025. If one channel is chosen, its BIST signature is written to the two registers. If both channels are chosen, the two channels’ results are XOR’ed and placed in the BIST signature register. The outputs are not disconnected during this test, so the PN sequence can be observed as it runs. The PN sequence can be continued from its last value or start from the beginning based on the value programmed in register 0x00E bit 2. The BIST signature result will vary based on the channel configuration. OUTPUT TEST MODES The output test options are shown in table x.x. When an output test mode is enabled, the analog section of the ADC is disconnected from the digital backend blocks and the test pattern is run through the output formatting block. As indicated in table x.x some of the test patterns are subject to output formatting and some are not. The seed value for the PN sequence tests can be forced if the PN reset bits are used to hold the generator in reset mode by setting bits 4 or 5 of register 0x0D. These tests can be performed with or without an analog signal, but do require an encode clock. |
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