| Datenblatt-Suchmaschine für elektronische Bauteile |
|
AD9640/PCB Datenblatt(PDF) 6 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9640/PCB Datenblatt(HTML) 6 Page - Analog Devices |
|
6 / 41 page ![]() AD9640 Preliminary Technical Data Rev. PrD | Page 6 of 41 ADC AC SPECIFICATIONS AVDD = 1.8 V, DVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS Enabled, Fast Detect Outputs disabled, Signal Monitor disabled, unless otherwise noted. Table 2. AD9640BCPZ-80 AD9640BCPZ-105 AD9640BCPZ-125 AD9640BCPZ-150 Parameter Temp Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit SIGNAL-TO-NOISE-RATIO (SNR) fIN = 2.4 MHz 25°C 72.0 71.9 71.9 71.9 dB Full dB fIN = 70 MHz 25°C 71.9 71.9 71.7 71.7 dB Full TBD TBD TBD TBD dB fIN = 100 MHz 25°C 71.6 71.6 71.6 71.6 dB fIN = 170 MHz 25°C 69.9 70.9 70.8 70.8 dB SIGNAL-TO-NOISE-AND DISTORTION (SINAD) fIN = 2.4 MHz 25°C 71.1 71.1 71.1 71.1 dB Full dB fIN = 70 MHz 25°C 71.5 70.8 70.6 70.6 dB Full TBD TBD TBD TBD dB fIN = 100 MHz 25°C 70.5 70.6 70.6 70.6 dB fIN = 170 MHz 25°C 68.0 69.9 69.8 69.8 dB EFFECTIVE NUMBER OF BITS (ENOB) fIN = 2.4 MHz 25°C 11.7 11.7 11.7 11.7 Bits fIN = 70 MHz 25°C 11.6 11.6 11.6 11.6 Bits fIN = 100 MHz 25°C 11.6 11.6 11.6 11.6 Bits fIN = 170 MHz 25°C 11.5 11.5 11.5 11.5 Bits WORST SECOND OR THIRD HARMONIC fIN = 2.4 MHz 25°C 90 90 90 90 dBc Full dBc fIN = 70 MHz 25°C 85 85 85 85 dBc Full dBc fIN = 100 MHz 25°C 85 85 85 83 dBc fIN = 170 MHz 25°C 84 83.4 83 83 dBc SPURIOUS-FREE DYNAMIC RANGE (SFDR) fIN = 2.4 MHz 25°C 90 90 90 90 dBc Full dBc fIN = 70 MHz 25°C 85 85 85 85 dBc Full dBc fIN = 100 MHz 25°C 85 85 85 83 dBc fIN = 170 MHz 25°C 84 83.4 83 80 dBc TWO TONE SFDR fIN = 30 MHz, 31 MHz (−7 dBFS ) 25°C TBD TBD TBD TBD dBc fIN = 170 MHz, 171 MHz (−7 dBFS ) 25°C TBD TBD TBD TBD dBc CROSSTALK Full 95 95 95 95 dB ANALOG INPUT BANDWIDTH 25°C 650 650 650 650 MHz MATCHING CHARACTERISTIC Offset Error 25°C TBD TBD TBD TBD %FSR Gain Error 25°C TBD TBD TBD TBD %FSR 1 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit. 2 Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure x for the equivalent analog input structure. 3 Standby power is measured with a dc input, the CLK pin inactive (set to AVDD or AGND). |
|
Link URL |
| War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Link zum Datenblatt | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |