WM8994ECSSLASHR datasheet(43/363 Pages) CIRRUS

43 / 363 page

WM8994

Rev 4.6

The WM8994 has highly flexible digital audio interfaces, supporting a number of protocols, including

I2S, DSP, MSB-first left/right justified, and can operate in master or slave modes. PCM operation is

supported in the DSP mode. A-law and

-law companding are also supported. Time division

multiplexing (TDM) is available to allow multiple devices to stream data simultaneously on the same

bus, saving space and power. The four digital MIC and ADC channels and four DAC channels are

available via four TDM channels on Digital Audio Interface 1 (AIF1).

A powerful digital mixing core allows data from each TDM channel of each audio interface and from

the ADCs and digital MICs to be mixed and re-routed back to a different audio interface and to the 4

DAC output channels. The digital mixing core can operate synchronously with either Audio Interface 1

or Audio Interface 2, with asynchronous stereo full duplex sample rate conversion performed on the

other audio interface as required.

The system clock (SYSCLK) provides clocking for the ADCs, DACs, DSP core, digital audio interface

and other circuits. SYSCLK can be derived directly from one of the MCLK1 or MCLK2 pins or via one

of two integrated FLLs, providing flexibility to support a wide range of clocking schemes. Typical

portable system MCLK frequencies, and sample rates from 8kHz to 96kHz are all supported.

Automatic configuration of the clocking circuits is available, derived from the sample rate and from the

MCLK / SYSCLK ratio.

The WM8994 uses a standard 2, 3 or 4-wire control interface, providing full software control of all

features, together with device register readback. An integrated Control Write Sequencer enables

automatic scheduling of control sequences; commonly-used signal configurations may be selected

using ready-programmed sequences, including time-optimised control of the WM8994 pop

suppression features. It is an ideal partner for a wide range of industry standard microprocessors,

controllers and DSPs. Unused circuitry can be disabled under software control, in order to save

power; low leakage currents enable extended standby/off time in portable battery-powered

applications.

Versatile GPIO functionality is provided, with support for button/accessory detect inputs, or for clock,

system status, or programmable logic level output for control of additional external circuitry. Interrupt

logic, status readback and de-bouncing options are supported within this functionality.

WM8994ECS/R Datenblatt(PDF) 43 Page - Cirrus Logic