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WM8994ECS/R Datenblatt(PDF) 70 Page - Cirrus Logic |
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WM8994ECS/R Datenblatt(HTML) 70 Page - Cirrus Logic |
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70 / 363 page ![]() WM8994 70 Rev 4.6 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1540 (0604h) DAC2 Left Mixer Routing 5 ADCR_TO_DAC 2L 0 Enable Sidetone STR to DAC2L 0 = Disabled 1 = Enabled 4 ADCL_TO_DAC 2L 0 Enable Sidetone STL to DAC2L 0 = Disabled 1 = Enabled 2 AIF2DACL_TO_ DAC2L 0 Enable AIF2 (Left) to DAC2L 0 = Disabled 1 = Enabled 1 AIF1DAC2L_TO _DAC2L 0 Enable AIF1 (Timeslot 1, Left) to DAC2L 0 = Disabled 1 = Enabled 0 AIF1DAC1L_TO _DAC2L 0 Enable AIF1 (Timeslot 0, Left) to DAC2L 0 = Disabled 1 = Enabled R1541 (0605h) DAC2 Right Mixer Routing 5 ADCR_TO_DAC 2R 0 Enable Sidetone STR to DAC2R 0 = Disabled 1 = Enabled 4 ADCL_TO_DAC 2R 0 Enable Sidetone STL to DAC2R 0 = Disabled 1 = Enabled 2 AIF2DACR_TO_ DAC2R 0 Enable AIF2 (Right) to DAC2R 0 = Disabled 1 = Enabled 1 AIF1DAC2R_TO _DAC2R 0 Enable AIF1 (Timeslot 1, Right) to DAC2R 0 = Disabled 1 = Enabled 0 AIF1DAC1R_TO _DAC2R 0 Enable AIF1 (Timeslot 0, Right) to DAC2R 0 = Disabled 1 = Enabled Table 20 DAC Output Digital Mixing AUDIO INTERFACE 2 (AIF2) DIGITAL MIXING There are two output channels on AIF2. The audio source for these two channels is the same as the selected source for DAC2L and DAC2R, as described in “DAC Output Digital Mixing”. Note that the Left/Right channels of AIF2 can be inve rted or interchanged if required; see “Digital Audio Interface Control ”. ULTRASONIC (4FS) AIF OUTPUT MODE The WM8994 provides an ultrasonic mode on the output paths of the AIF1 audio interface. The ultrasonic mode enables high frequency signals (such as ultrasonic microphone signals) to be output. Ultrasonic mode is enabled on AIF1 using the AIF1ADC_4FS register bit. When the ultrasonic mode is selected, the AIF1 output sample rate is increased by a factor of 4. For example, a 48kHz sample rate will be output at 192kHz in ultrasonic mode. Ultrasonic mode is only supported in AIF Master mode and uses the ADCLRCLK output (not the LRCLK). When ultrasonic mode is enabled, AIF1 must be configured in Master mode, as described in |
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