WM8994ECSSLASHR datasheet(62/363 Pages) CIRRUS

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WM8994

Rev 4.6

DIGITAL CORE ARCHITECTURE

The WM8994 Digital Core provides an extensive set of mixing and signal processing features. The

Digital Core Architecture is illustrated in Figure 21, which also identifies the datasheet sections

applicable to each portion of the Digital Core.

Audio Interface 1 (AIF1) supports audio input and output on two stereo timeslots simultaneously,

making a total of four inputs and four outputs. The mixing of the four AIF1 output paths is described in

“Audio Interface 1 (AIF1) Output Mixing”.

A digital mixing path from the ADCs or Digital Microphones to the DAC output paths provides a high

quality sidetone for voice calls or other applications. The sidetone configu

ration is described in “Digital

Sidetone Mixing

”; the associated filter and volume control is described in “Digital Sidetone Volume

and Filter Control

”.

Each of the four hi-fi DACs has a dedicated mixer for controlling the signal paths to that DAC. The

configuration of these signal paths is described in “DAC Output Digital Mixing”.

Each DAC is provided with digital volume control, soft mute / un-mute and a low pass filter. The

ass

ociated controls are defined in the “Digital to Analogue Converter (DAC)” section.

Digital processing can be applied to the four input channels of AIF1 and the two input channels of

AIF2. The available features include 5-band equalization (EQ), 3D stereo expansion and dynamic

range control (DRC).

The EQ provides the capability to tailor the audio path according to the frequency characteristics of an

earpiece or loudspeaker, and/or according to user preferences. The EQ controls are described in

“ReTune Mobile Parametric Equalizer (EQ)”. The DRC provides adaptive signal level control to

improve the handling of unpredictable signal levels and to improve intelligibility in the presence of

transients and impulsi

ve noises. The DRC controls are described in “Dynamic Range Control (DRC)”.

3D stereo expansion provides a stereo enhancement effect; the depth of the effect is programmable,

as described in “3D Stereo Expansion”.

The input channels of AIF1 and AIF2 are also equipped with digital volume control, soft mute / un-

mute and de-

emphasis filter control; see “Digital Volume and Filter Control” for details of these

features.

The output channels of AIF1 and AIF2 can be configured using the digital volume control and a

programmable high-pass filter (HPF). The Dynamic Range Control (DRC) circuit can also be applied

here, with the restriction that a DRC cannot be enabled in the input and output path of one AIF

channel at the same time. The AIF output volume and filter controls are described in “Digital Volume

and Filter Control

”.

The WM8994 provides an ultrasonic mode on the output paths of AIF1, allowing high frequency

signals (such as ultrasonic microphone signals) to be output. See “Ultrasonic (4FS) AIF Output Mode”

for further details.

The WM8994 provides two full audio interfaces, AIF1 and AIF2. Each interface supports a number of

protocols, including I2S, DSP, MSB-first left/right justified, and can operate in master or slave modes.

PCM operation is supported in the DSP mode. A-law and

-law companding are also supported. Time

division multiplexing (TDM) is available to allow multiple devices to stream data simultaneously on the

same bus, saving space and power.

Four-channel input and output is supported using TDM on AIF1. Two-channel input and output is

supported on AIF2. A third interface, AIF3, is partially supported, using multiplexers to re-configure

alternate connections to AIF1 or AIF2.

Signal mixing between audio interfaces is possible. The WM8994 performs stereo full-duplex sample

rate conversion between the audio interfaces as required. (Note that sample rate conversion is not

supported on some signal paths, as noted in Figure 21).

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