WM8994ECSSLASHR datasheet(79/363 Pages) CIRRUS

79 / 363 page

WM8994

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1091 (0443h)

AIF1 DRC1 (4)

10:5

AIF1DRC1_KNE

E_IP [5:0]

000000

AIF1 DRC1 Input signal level at the

Compressor ‘Knee’.

000000 = 0dB

000001 = -0.75dB

000010 = -1.5dB

… (-0.75dB steps)

111100 = -45dB

111101 = Reserved

11111X = Reserved

4:0

AIF1DRC1_KNE

E_OP [4:0]

00000

AIF1 DRC1 Output signal at the

Compressor ‘Knee’.

00000 = 0dB

00001 = -0.75dB

00010 = -1.5dB

… (-0.75dB steps)

11110 = -22.5dB

11111 = Reserved

R1092 (0444h)

AIF1 DRC1 (5)

9:5

AIF1DRC1_KNE

E2_IP [4:0]

00000

AIF1 DRC1 Input signal level at the

Noise Gate threshold ‘Knee2’.

00000 = -36dB

00001 = -37.5dB

00010 = -39dB

… (-1.5dB steps)

11110 = -81dB

11111 = -82.5dB

Only applicable when

AIF1DRC1_NG_ENA = 1.

4:0

AIF1DRC1_KNE

E2_OP [4:0]

00000

AIF1 DRC1 Output signal at the

Noise Gate threshold ‘Knee2’.

00000 = -30dB

00001 = -31.5dB

00010 = -33dB

… (-1.5dB steps)

11110 = -75dB

11111 = -76.5dB

Only applicable when

AIF1DRC1_KNEE2_OP_ENA = 1.

Table 24 AIF1 Timeslot 0 DRC Controls

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1104 (0450h)

AIF1 DRC2 (1)

AIF1DRC2_NG_

ENA

AIF1 DRC2 Noise Gate Enable

0 = Disabled

1 = Enabled

AIF1DRC2_KNE

E2_OP_ENA

AIF1 DRC2 KNEE2_OP Enable

0 = Disabled

1 = Enabled

AIF1DRC2_QR

AIF1 DRC2 Quick-release Enable

0 = Disabled

1 = Enabled

AIF1DRC2_ANTI

CLIP

AIF1 DRC2 Anti-clip Enable

0 = Disabled

1 = Enabled

WM8994ECS/R Datenblatt(PDF) 79 Page - Cirrus Logic

WM8994ECS/R Datenblatt(HTML) 79 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datenblatt Download

Link URL