WM8994ECSSLASHR datasheet(82/363 Pages) CIRRUS

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WM8994

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1107 (0453h)

AIF1 DRC2 (4)

10:5

AIF1DRC2_KNE

E_IP [5:0]

000000

AIF1 DRC2 Input signal level at the

Compressor ‘Knee’.

000000 = 0dB

000001 = -0.75dB

000010 = -1.5dB

… (-0.75dB steps)

111100 = -45dB

111101 = Reserved

11111X = Reserved

4:0

AIF1DRC2_KNE

E_OP [4:0]

00000

AIF1 DRC2 Output signal at the

Compressor ‘Knee’.

00000 = 0dB

00001 = -0.75dB

00010 = -1.5dB

… (-0.75dB steps)

11110 = -22.5dB

11111 = Reserved

R1108 (0454h)

AIF1 DRC2 (5)

9:5

AIF1DRC2_KNE

E2_IP [4:0]

00000

AIF1 DRC2 Input signal level at the

Noise Gate threshold ‘Knee2’.

00000 = -36dB

00001 = -37.5dB

00010 = -39dB

… (-1.5dB steps)

11110 = -81dB

11111 = -82.5dB

Only applicable when

AIF1DRC2_NG_ENA = 1.

4:0

AIF1DRC2_KNE

E2_OP [4:0]

00000

AIF1 DRC2 Output signal at the

Noise Gate threshold ‘Knee2’.

00000 = -30dB

00001 = -31.5dB

00010 = -33dB

… (-1.5dB steps)

11110 = -75dB

11111 = -76.5dB

Only applicable when

AIF1DRC2_KNEE2_OP_ENA = 1.

Table 25 AIF1 Timeslot 1 DRC Controls

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R1344 (0540h)

AIF2 DRC (1)

AIF2DRC_NG_E

AIF2 DRC Noise Gate Enable

0 = Disabled

1 = Enabled

AIF2DRC_KNEE

2_OP_ENA

AIF2 DRC KNEE2_OP Enable

0 = Disabled

1 = Enabled

AIF2DRC_QR

AIF2 DRC Quick-release Enable

0 = Disabled

1 = Enabled

AIF2DRC_ANTI

CLIP

AIF2 DRC Anti-clip Enable

0 = Disabled

1 = Enabled

WM8994ECS/R Datenblatt(PDF) 82 Page - Cirrus Logic

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