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WM8994ECS/R Datenblatt(PDF) 85 Page - Cirrus Logic |
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WM8994ECS/R Datenblatt(HTML) 85 Page - Cirrus Logic |
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85 / 363 page ![]() WM8994 Rev 4.6 85 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R1347 (0543h) AIF2 DRC (4) 10:5 AIF2DRC_KNEE _IP [5:0] 000000 AIF2 DRC Input signal level at the Compressor ‘Knee’. 000000 = 0dB 000001 = -0.75dB 000010 = -1.5dB … (-0.75dB steps) 111100 = -45dB 111101 = Reserved 11111X = Reserved 4:0 AIF2DRC_KNEE _OP [4:0] 00000 AIF2 DRC Output signal at the Compressor ‘Knee’. 00000 = 0dB 00001 = -0.75dB 00010 = -1.5dB … (-0.75dB steps) 11110 = -22.5dB 11111 = Reserved R1348 (0544h) AIF2 DRC (5) 9:5 AIF2DRC_KNEE 2_IP [4:0] 00000 AIF2 DRC Input signal level at the Noise Gate threshold ‘Knee2’. 00000 = -36dB 00001 = -37.5dB 00010 = -39dB … (-1.5dB steps) 11110 = -81dB 11111 = -82.5dB Only applicable when AIF2DRC_NG_ENA = 1. 4:0 AIF2DRC_KNEE 2_OP [4:0] 00000 AIF2 DRC Output signal at the Noise Gate threshold ‘Knee2’. 00000 = -30dB 00001 = -31.5dB 00010 = -33dB … (-1.5dB steps) 11110 = -75dB 11111 = -76.5dB Only applicable when AIF2DRC_KNEE2_OP_ENA = 1. Table 26 AIF2 DRC Controls |
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