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WM8994ECS/R Datenblatt(PDF) 29 Page - Cirrus Logic |
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WM8994ECS/R Datenblatt(HTML) 29 Page - Cirrus Logic |
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29 / 363 page ![]() WM8994 Rev 4.6 29 MISCELLANEOUS CHARACTERISTICS Test Conditions AVDD1=3.0V (powered from LDO1), DCVDD=1.0V (powered from LDO2), AVDD2=DBVDD=LDO2VDD=CPVDD=1.8V, LDO1VDD=SPKVDD1=SPKVDD2=5V, DGND=AGND=CPGND=SPKGND1=SPKGND2=HP2GND=0V, TA = +25 oC, unless otherwise stated. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Analogue Reference Levels H1 VMID Midrail Reference Voltage VMID_SEL = 01, 4.7 F capacitor on VMIDC -3% AVDD1/2 +3% V VMID Start-Up time VMID_SEL = 01, VMID_RAMP = 11, 4.7 F capacitor on VMIDC 50 ms Frequency Locked Loops (FLLs) H29 Lock time FREF=32kHz, FOUT=12.288MHz 2.5 ms FREF=12MHz, FOUT=12.288MHz 300 s H30 Free-running mode start-up time VMID enabled 100 s H31 Free-running mode frequency accuracy Reference supplied initially +/-10 % No reference provided +/-30 % LDO Regulators H38 LDO1 Start-Up Time 4.7 F capacitor on AVDD1, 1 F capacitor on VREFC 1.5 ms LDO1 Drop-Out voltage (LDO1VDD - AVDD1) 300 mV LDO1 PSRR (LDO1VDD) 100mV (pk-pk) 217Hz TBD dB H42 LDO2 Start-Up Time 1 F capacitor on DCVDD, 1 F capacitor on VREFC 1.5 ms LDO2 PSRR (LDO2VDD) 100mV (pk-pk) 217Hz TBD dB |
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